diff --git a/pat80-io-devices/composite-pal-adapter/software/avr-assembly/Makefile b/pat80-io-devices/composite-pal-adapter/software/avr-assembly/Makefile
index 1ea2994..718652f 100644
--- a/pat80-io-devices/composite-pal-adapter/software/avr-assembly/Makefile
+++ b/pat80-io-devices/composite-pal-adapter/software/avr-assembly/Makefile
@@ -2,4 +2,8 @@ pal-adapter:
 	@echo "Building pal adapter rom..."
 	@avra main.asm
 	@echo "Writing to ATMEGA1284..."
-	@minipro -w main.hex -p ATMEGA1284
\ No newline at end of file
+	@minipro -w main.hex -p ATMEGA1284
+
+fuses:
+	@echo "Writing fuses.conf..."
+	@minipro -w fuses.conf -c config -p ATMEGA1284
diff --git a/pat80-io-devices/composite-pal-adapter/software/avr-assembly/README.md b/pat80-io-devices/composite-pal-adapter/software/avr-assembly/README.md
index e4299ed..4acbf31 100644
--- a/pat80-io-devices/composite-pal-adapter/software/avr-assembly/README.md
+++ b/pat80-io-devices/composite-pal-adapter/software/avr-assembly/README.md
@@ -1,4 +1,12 @@
 # Atmega Microcontroller
+
+## Auto build & flash
+Use make to build & flash automatically.
+The first time the microcontroller is flashed, is needed to flash fuses:
+`make fuses`
+Then, every time the asm code is changed, it can be built and flashed with:
+`make`
+
 ## Build ASM code
 `avra filename.asm` (generates *filename.hex*)
 
diff --git a/pat80-io-devices/composite-pal-adapter/software/avr-assembly/fuses.conf b/pat80-io-devices/composite-pal-adapter/software/avr-assembly/fuses.conf
index fc9d0a0..7fdd51e 100644
--- a/pat80-io-devices/composite-pal-adapter/software/avr-assembly/fuses.conf
+++ b/pat80-io-devices/composite-pal-adapter/software/avr-assembly/fuses.conf
@@ -1,4 +1,4 @@
-fuses_lo = 0xAF
+fuses_lo = 0xEF
 fuses_hi = 0x99
 fuses_ext = 0xff
 lock_byte = 0xff
diff --git a/pat80-io-devices/composite-pal-adapter/software/avr-assembly/main.asm b/pat80-io-devices/composite-pal-adapter/software/avr-assembly/main.asm
index 945c6f1..a75e2cc 100644
--- a/pat80-io-devices/composite-pal-adapter/software/avr-assembly/main.asm
+++ b/pat80-io-devices/composite-pal-adapter/software/avr-assembly/main.asm
@@ -4,7 +4,7 @@
 ; This also displays byte's MSB pixel "for free", as the video pin is PD7 (last bit of PORTA).
 ;
 ; INTERFACING WITH PAT80:
-; Use PortB as data port. Before writing anything, issue a read (pin RW HIGH) and check the busy pin on the data port. 
+; Use PortB as data port. Before writing anything, issue a read (pin RW HIGH) and check the busy pin on the data port.
 ; If the busy pin is high, retry reading until goes low. When the busy pin goes low, we have... TODO
 ;
 ; ELECTRONICALLY:
@@ -45,17 +45,18 @@
 .def HIGH_ACCUM = r16 ; an accumulator in high registers to be used outside of interrupts
 
 ; define constant
-.equ VIDEO_PORT_OUT = PORTA		; Used all PORTA, but connected only PA0
+.equ VIDEO_PORT_OUT = PORTA		; PORTA is connected to a parallel-in serial-out shift register
 .equ SYNC_PIN = PC0			; Sync pin (pin 22)
 .equ DEBUG_PIN = PC1		; DEBUG: Single vertical sync pulse to trigger oscilloscope (pin 23)
-.equ DATA_PORT_IN = PINB
-.equ CLK_PIN = PD0
-.equ RS_PIN = PD1
-.equ BUSY_PIN = PD2
+.equ SR_LD_PIN = PC2		; LD pin of shift register (active low)
+.equ DATA_PORT_IN = PIND
+.equ CLK_PIN = PC3
+.equ RS_PIN = PC4
+.equ BUSY_PIN = PC5
 
 ; memory
 .equ FRAMEBUFFER = 0x0100
-.equ FRAMEBUFFER_END = 0x3EC0
+.equ FRAMEBUFFER_END = 0x3D00	; 15kb @ 512x240
 
 ; start vector
 .org 0x0000
diff --git a/pat80-io-devices/composite-pal-adapter/software/avr-assembly/video_generator.asm b/pat80-io-devices/composite-pal-adapter/software/avr-assembly/video_generator.asm
index d1531ff..72d0271 100644
--- a/pat80-io-devices/composite-pal-adapter/software/avr-assembly/video_generator.asm
+++ b/pat80-io-devices/composite-pal-adapter/software/avr-assembly/video_generator.asm
@@ -23,8 +23,10 @@
 ;	21-32 = short sync
 ;	33-255 = invalid state or screen draw finished: set to 0 and restart from first long sync start
 
-.equ TIMER_DELAY_30US = 65535 - 690 	; 719 cycles @ 24Mhz (minus overhead)
-.equ TIMER_DELAY_2US = 65535 - 17		; 48 cycles @ 24Mhz (minus overhead)
+.equ TIMER_DELAY_30US = 65535 - 300 	; 333 cycles @ 11Mhz (minus overhead)
+.equ TIMER_DELAY_2US = 65535 - 8		; 22 cycles @ 11Mhz (minus overhead)
+.equ DURATION_DELAY_4US = 16		; 44 cycles @ 11Mhz
+.equ DURATION_DELAY_8US = 88		; 88 cycles @ 11Mhz
 
 
 ; ********* FUNCTIONS CALLED BY INTERRUPT ***********
@@ -51,73 +53,36 @@ draw_picture:
 	; save X register
 	push XH
 	push XL
-	
+
 	; set X register to framebuffer start 0x0100
 	; (set it a byte before, because it will be incremented at first)
-	clr r27
-	ldi r26, 0xFF
+	ldi r27, high(FRAMEBUFFER - 1)
+	ldi r26, low(FRAMEBUFFER - 1)
 
-	; start 304 picture lines
-	ldi LINE_COUNTER, 152	; line counter
+	; start 32 empty picture lines (back porch)
+	ldi LINE_COUNTER, 32	; line counter
+	back_porch_picture_loop:
+		call draw_empty_line	; 3 cycles (+ 3 to come back)
+		dec LINE_COUNTER ; decrement line countr					; 1 cycle
+		brne back_porch_picture_loop	; if not 0, repeat h_picture_loop		; 2 cycle if true, 1 if false
+	; end picture lines
+
+	; start 240 picture lines
+	ldi LINE_COUNTER, 240	; line counter
 	h_picture_loop:
-		; ***************** DRAW FIRST LINE *********************
-
-		; **** start line sync: 4uS, 96 cycles @ 24Mhz
-		; video pin goes low before sync
-		clr VG_HIGH_ACCUM										; 1 cycle
-		out VIDEO_PORT_OUT, VG_HIGH_ACCUM						; 1 cycle
-
-		cbi	PORTC, SYNC_PIN	; sync goes low (0v)					; 2 cycle
-		ldi VG_HIGH_ACCUM, 31									; 1 cycle
-		l_sync_pulse_loop: ; requires 3 cpu cycles
-			dec VG_HIGH_ACCUM									; 1 cycle
-			brne l_sync_pulse_loop  								; 2 cycle if true, 1 if false
-		sbi	PORTC, SYNC_PIN	; sync goes high (0.3v)
-		; **** end line sync
-
-		; **** start line back porch: 8uS, 192 cycles @ 24Mhz
-		; leave time at the end for line setup and draw_line call
-		ldi VG_HIGH_ACCUM, 62									; 1 cycle
-		l_sync_back_porch_loop:
-			dec VG_HIGH_ACCUM									; 1 cycle
-			brne l_sync_back_porch_loop  							; 2 cycle if true, 1 if false
-		; **** end back porch
-
 		call draw_line	; 3 cycles (+ 3 to come back to on_line_drawn)
-		; **** draws line pixels: 52uS, 1248 cycles @ 24Mhz ****
-
-
-
-		; ***************** DRAW SECOND LINE *********************
-
-		; **** start line sync: 4uS, 96 cycles @ 24Mhz
-		; video pin goes low before sync
-		clr VG_HIGH_ACCUM										; 1 cycle
-		out VIDEO_PORT_OUT, VG_HIGH_ACCUM						; 1 cycle
-
-		cbi	PORTC, SYNC_PIN	; sync goes low (0v)					; 2 cycle
-		ldi VG_HIGH_ACCUM, 31									; 1 cycle
-		l_sync_pulse_loop2: ; requires 3 cpu cycles
-			dec VG_HIGH_ACCUM									; 1 cycle
-			brne l_sync_pulse_loop2  								; 2 cycle if true, 1 if false
-		sbi	PORTC, SYNC_PIN	; sync goes high (0.3v)
-		; **** end line sync
-
-		; **** start line back porch: 8uS, 192 cycles @ 24Mhz
-		; leave time at the end for line setup and draw_line call
-		ldi VG_HIGH_ACCUM, 62									; 1 cycle
-		l_sync_back_porch_loop2:
-			dec VG_HIGH_ACCUM									; 1 cycle
-			brne l_sync_back_porch_loop2  							; 2 cycle if true, 1 if false
-		; **** end back porch
-
-		call draw_line	; 3 cycles (+ 3 to come back to on_line_drawn)
-		; **** draws line pixels: 52uS, 1248 cycles @ 24Mhz ****
-
 		dec LINE_COUNTER ; decrement line countr					; 1 cycle
 		brne h_picture_loop	; if not 0, repeat h_picture_loop		; 2 cycle if true, 1 if false
 	; end picture lines
 
+	; start 32 empty picture lines (front porch)
+	ldi LINE_COUNTER, 32	; line counter
+	front_porch_picture_loop:
+		call draw_empty_line	; 3 cycles (+ 3 to come back)
+		dec LINE_COUNTER ; decrement line countr					; 1 cycle
+		brne front_porch_picture_loop	; if not 0, repeat h_picture_loop		; 2 cycle if true, 1 if false
+	; end picture lines
+
 	; restore X register
 	pop XL
 	pop XH
@@ -191,1307 +156,57 @@ short_sync:
 
 
 draw_line:
-	; NO loops, as this is time-strict
-	; 52 chunks of 8 pixels
+	; **** start line sync: 4uS, 16 cycles @ 11Mhz
+	; video pin goes low before sync
+	clr VG_HIGH_ACCUM										; 1 cycle
+	out VIDEO_PORT_OUT, VG_HIGH_ACCUM						; 1 cycle
 
-	; chunk 1
-	ld A, X+	; load pixel	; 2 cycles
-	out VIDEO_PORT_OUT, A				; 1 cycle
-	nop							; 1 cycle
-	lsr A						; 1 cycle
-	out VIDEO_PORT_OUT, A				; 1 cycle
-	nop							; 1 cycle
-	lsr A						; 1 cycle
-	out VIDEO_PORT_OUT, A				; 1 cycle
-	nop							; 1 cycle
-	lsr A						; 1 cycle
-	out VIDEO_PORT_OUT, A				; 1 cycle
-	nop							; 1 cycle
-	lsr A						; 1 cycle
-	out VIDEO_PORT_OUT, A				; 1 cycle
-	nop							; 1 cycle
-	lsr A						; 1 cycle
-	out VIDEO_PORT_OUT, A				; 1 cycle
-	nop							; 1 cycle
-	lsr A						; 1 cycle
-	out VIDEO_PORT_OUT, A				; 1 cycle
-	nop							; 1 cycle
-	lsr A						; 1 cycle
-	out VIDEO_PORT_OUT, A				; 1 cycle
+	cbi	PORTC, SYNC_PIN	; sync goes low (0v)					; 2 cycle
+	ldi VG_HIGH_ACCUM, DURATION_DELAY_4US/3						; 1 cycle
+	l_sync_pulse_loop: ; requires 3 cpu cycles
+		dec VG_HIGH_ACCUM									; 1 cycle
+		brne l_sync_pulse_loop  								; 2 cycle if true, 1 if false
+	sbi	PORTC, SYNC_PIN	; sync goes high (0.3v)
+	; **** end line sync
 
-	; chunk 2
-	ld A, X+	; load pixel	; 2 cycles
-	out VIDEO_PORT_OUT, A				; 1 cycle
-	nop							; 1 cycle
-	lsr A						; 1 cycle
-	out VIDEO_PORT_OUT, A				; 1 cycle
-	nop							; 1 cycle
-	lsr A						; 1 cycle
-	out VIDEO_PORT_OUT, A				; 1 cycle
-	nop							; 1 cycle
-	lsr A						; 1 cycle
-	out VIDEO_PORT_OUT, A				; 1 cycle
-	nop							; 1 cycle
-	lsr A						; 1 cycle
-	out VIDEO_PORT_OUT, A				; 1 cycle
-	nop							; 1 cycle
-	lsr A						; 1 cycle
-	out VIDEO_PORT_OUT, A				; 1 cycle
-	nop							; 1 cycle
-	lsr A						; 1 cycle
-	out VIDEO_PORT_OUT, A				; 1 cycle
-	nop							; 1 cycle
-	lsr A						; 1 cycle
-	out VIDEO_PORT_OUT, A				; 1 cycle
-
-	; chunk 3
-	ld A, X+	; load pixel	; 2 cycles
-	out VIDEO_PORT_OUT, A				; 1 cycle
-	nop							; 1 cycle
-	lsr A						; 1 cycle
-	out VIDEO_PORT_OUT, A				; 1 cycle
-	nop							; 1 cycle
-	lsr A						; 1 cycle
-	out VIDEO_PORT_OUT, A				; 1 cycle
-	nop							; 1 cycle
-	lsr A						; 1 cycle
-	out VIDEO_PORT_OUT, A				; 1 cycle
-	nop							; 1 cycle
-	lsr A						; 1 cycle
-	out VIDEO_PORT_OUT, A				; 1 cycle
-	nop							; 1 cycle
-	lsr A						; 1 cycle
-	out VIDEO_PORT_OUT, A				; 1 cycle
-	nop							; 1 cycle
-	lsr A						; 1 cycle
-	out VIDEO_PORT_OUT, A				; 1 cycle
-	nop							; 1 cycle
-	lsr A						; 1 cycle
-	out VIDEO_PORT_OUT, A				; 1 cycle
-
-	; chunk 4
-	ld A, X+	; load pixel	; 2 cycles
-	out VIDEO_PORT_OUT, A				; 1 cycle
-	nop							; 1 cycle
-	lsr A						; 1 cycle
-	out VIDEO_PORT_OUT, A				; 1 cycle
-	nop							; 1 cycle
-	lsr A						; 1 cycle
-	out VIDEO_PORT_OUT, A				; 1 cycle
-	nop							; 1 cycle
-	lsr A						; 1 cycle
-	out VIDEO_PORT_OUT, A				; 1 cycle
-	nop							; 1 cycle
-	lsr A						; 1 cycle
-	out VIDEO_PORT_OUT, A				; 1 cycle
-	nop							; 1 cycle
-	lsr A						; 1 cycle
-	out VIDEO_PORT_OUT, A				; 1 cycle
-	nop							; 1 cycle
-	lsr A						; 1 cycle
-	out VIDEO_PORT_OUT, A				; 1 cycle
-	nop							; 1 cycle
-	lsr A						; 1 cycle
-	out VIDEO_PORT_OUT, A				; 1 cycle
-
-	; chunk 5
-	ld A, X+	; load pixel	; 2 cycles
-	out VIDEO_PORT_OUT, A				; 1 cycle
-	nop							; 1 cycle
-	lsr A						; 1 cycle
-	out VIDEO_PORT_OUT, A				; 1 cycle
-	nop							; 1 cycle
-	lsr A						; 1 cycle
-	out VIDEO_PORT_OUT, A				; 1 cycle
-	nop							; 1 cycle
-	lsr A						; 1 cycle
-	out VIDEO_PORT_OUT, A				; 1 cycle
-	nop							; 1 cycle
-	lsr A						; 1 cycle
-	out VIDEO_PORT_OUT, A				; 1 cycle
-	nop							; 1 cycle
-	lsr A						; 1 cycle
-	out VIDEO_PORT_OUT, A				; 1 cycle
-	nop							; 1 cycle
-	lsr A						; 1 cycle
-	out VIDEO_PORT_OUT, A				; 1 cycle
-	nop							; 1 cycle
-	lsr A						; 1 cycle
-	out VIDEO_PORT_OUT, A				; 1 cycle
-
-	; chunk 6
-	ld A, X+	; load pixel	; 2 cycles
-	out VIDEO_PORT_OUT, A				; 1 cycle
-	nop							; 1 cycle
-	lsr A						; 1 cycle
-	out VIDEO_PORT_OUT, A				; 1 cycle
-	nop							; 1 cycle
-	lsr A						; 1 cycle
-	out VIDEO_PORT_OUT, A				; 1 cycle
-	nop							; 1 cycle
-	lsr A						; 1 cycle
-	out VIDEO_PORT_OUT, A				; 1 cycle
-	nop							; 1 cycle
-	lsr A						; 1 cycle
-	out VIDEO_PORT_OUT, A				; 1 cycle
-	nop							; 1 cycle
-	lsr A						; 1 cycle
-	out VIDEO_PORT_OUT, A				; 1 cycle
-	nop							; 1 cycle
-	lsr A						; 1 cycle
-	out VIDEO_PORT_OUT, A				; 1 cycle
-	nop							; 1 cycle
-	lsr A						; 1 cycle
-	out VIDEO_PORT_OUT, A				; 1 cycle
-
-	; chunk 7
-	ld A, X+	; load pixel	; 2 cycles
-	out VIDEO_PORT_OUT, A				; 1 cycle
-	nop							; 1 cycle
-	lsr A						; 1 cycle
-	out VIDEO_PORT_OUT, A				; 1 cycle
-	nop							; 1 cycle
-	lsr A						; 1 cycle
-	out VIDEO_PORT_OUT, A				; 1 cycle
-	nop							; 1 cycle
-	lsr A						; 1 cycle
-	out VIDEO_PORT_OUT, A				; 1 cycle
-	nop							; 1 cycle
-	lsr A						; 1 cycle
-	out VIDEO_PORT_OUT, A				; 1 cycle
-	nop							; 1 cycle
-	lsr A						; 1 cycle
-	out VIDEO_PORT_OUT, A				; 1 cycle
-	nop							; 1 cycle
-	lsr A						; 1 cycle
-	out VIDEO_PORT_OUT, A				; 1 cycle
-	nop							; 1 cycle
-	lsr A						; 1 cycle
-	out VIDEO_PORT_OUT, A				; 1 cycle
-
-	; chunk 8
-	ld A, X+	; load pixel	; 2 cycles
-	out VIDEO_PORT_OUT, A				; 1 cycle
-	nop							; 1 cycle
-	lsr A						; 1 cycle
-	out VIDEO_PORT_OUT, A				; 1 cycle
-	nop							; 1 cycle
-	lsr A						; 1 cycle
-	out VIDEO_PORT_OUT, A				; 1 cycle
-	nop							; 1 cycle
-	lsr A						; 1 cycle
-	out VIDEO_PORT_OUT, A				; 1 cycle
-	nop							; 1 cycle
-	lsr A						; 1 cycle
-	out VIDEO_PORT_OUT, A				; 1 cycle
-	nop							; 1 cycle
-	lsr A						; 1 cycle
-	out VIDEO_PORT_OUT, A				; 1 cycle
-	nop							; 1 cycle
-	lsr A						; 1 cycle
-	out VIDEO_PORT_OUT, A				; 1 cycle
-	nop							; 1 cycle
-	lsr A						; 1 cycle
-	out VIDEO_PORT_OUT, A				; 1 cycle
-
-	; chunk 9
-	ld A, X+	; load pixel	; 2 cycles
-	out VIDEO_PORT_OUT, A				; 1 cycle
-	nop							; 1 cycle
-	lsr A						; 1 cycle
-	out VIDEO_PORT_OUT, A				; 1 cycle
-	nop							; 1 cycle
-	lsr A						; 1 cycle
-	out VIDEO_PORT_OUT, A				; 1 cycle
-	nop							; 1 cycle
-	lsr A						; 1 cycle
-	out VIDEO_PORT_OUT, A				; 1 cycle
-	nop							; 1 cycle
-	lsr A						; 1 cycle
-	out VIDEO_PORT_OUT, A				; 1 cycle
-	nop							; 1 cycle
-	lsr A						; 1 cycle
-	out VIDEO_PORT_OUT, A				; 1 cycle
-	nop							; 1 cycle
-	lsr A						; 1 cycle
-	out VIDEO_PORT_OUT, A				; 1 cycle
-	nop							; 1 cycle
-	lsr A						; 1 cycle
-	out VIDEO_PORT_OUT, A				; 1 cycle
-
-	; chunk 10
-	ld A, X+	; load pixel	; 2 cycles
-	out VIDEO_PORT_OUT, A				; 1 cycle
-	nop							; 1 cycle
-	lsr A						; 1 cycle
-	out VIDEO_PORT_OUT, A				; 1 cycle
-	nop							; 1 cycle
-	lsr A						; 1 cycle
-	out VIDEO_PORT_OUT, A				; 1 cycle
-	nop							; 1 cycle
-	lsr A						; 1 cycle
-	out VIDEO_PORT_OUT, A				; 1 cycle
-	nop							; 1 cycle
-	lsr A						; 1 cycle
-	out VIDEO_PORT_OUT, A				; 1 cycle
-	nop							; 1 cycle
-	lsr A						; 1 cycle
-	out VIDEO_PORT_OUT, A				; 1 cycle
-	nop							; 1 cycle
-	lsr A						; 1 cycle
-	out VIDEO_PORT_OUT, A				; 1 cycle
-	nop							; 1 cycle
-	lsr A						; 1 cycle
-	out VIDEO_PORT_OUT, A				; 1 cycle
-
-	; chunk 11
-	ld A, X+	; load pixel	; 2 cycles
-	out VIDEO_PORT_OUT, A				; 1 cycle
-	nop							; 1 cycle
-	lsr A						; 1 cycle
-	out VIDEO_PORT_OUT, A				; 1 cycle
-	nop							; 1 cycle
-	lsr A						; 1 cycle
-	out VIDEO_PORT_OUT, A				; 1 cycle
-	nop							; 1 cycle
-	lsr A						; 1 cycle
-	out VIDEO_PORT_OUT, A				; 1 cycle
-	nop							; 1 cycle
-	lsr A						; 1 cycle
-	out VIDEO_PORT_OUT, A				; 1 cycle
-	nop							; 1 cycle
-	lsr A						; 1 cycle
-	out VIDEO_PORT_OUT, A				; 1 cycle
-	nop							; 1 cycle
-	lsr A						; 1 cycle
-	out VIDEO_PORT_OUT, A				; 1 cycle
-	nop							; 1 cycle
-	lsr A						; 1 cycle
-	out VIDEO_PORT_OUT, A				; 1 cycle
-
-	; chunk 12
-	ld A, X+	; load pixel	; 2 cycles
-	out VIDEO_PORT_OUT, A				; 1 cycle
-	nop							; 1 cycle
-	lsr A						; 1 cycle
-	out VIDEO_PORT_OUT, A				; 1 cycle
-	nop							; 1 cycle
-	lsr A						; 1 cycle
-	out VIDEO_PORT_OUT, A				; 1 cycle
-	nop							; 1 cycle
-	lsr A						; 1 cycle
-	out VIDEO_PORT_OUT, A				; 1 cycle
-	nop							; 1 cycle
-	lsr A						; 1 cycle
-	out VIDEO_PORT_OUT, A				; 1 cycle
-	nop							; 1 cycle
-	lsr A						; 1 cycle
-	out VIDEO_PORT_OUT, A				; 1 cycle
-	nop							; 1 cycle
-	lsr A						; 1 cycle
-	out VIDEO_PORT_OUT, A				; 1 cycle
-	nop							; 1 cycle
-	lsr A						; 1 cycle
-	out VIDEO_PORT_OUT, A				; 1 cycle
-
-	; chunk 13
-	ld A, X+	; load pixel	; 2 cycles
-	out VIDEO_PORT_OUT, A				; 1 cycle
-	nop							; 1 cycle
-	lsr A						; 1 cycle
-	out VIDEO_PORT_OUT, A				; 1 cycle
-	nop							; 1 cycle
-	lsr A						; 1 cycle
-	out VIDEO_PORT_OUT, A				; 1 cycle
-	nop							; 1 cycle
-	lsr A						; 1 cycle
-	out VIDEO_PORT_OUT, A				; 1 cycle
-	nop							; 1 cycle
-	lsr A						; 1 cycle
-	out VIDEO_PORT_OUT, A				; 1 cycle
-	nop							; 1 cycle
-	lsr A						; 1 cycle
-	out VIDEO_PORT_OUT, A				; 1 cycle
-	nop							; 1 cycle
-	lsr A						; 1 cycle
-	out VIDEO_PORT_OUT, A				; 1 cycle
-	nop							; 1 cycle
-	lsr A						; 1 cycle
-	out VIDEO_PORT_OUT, A				; 1 cycle
-
-	; chunk 14
-	ld A, X+	; load pixel	; 2 cycles
-	out VIDEO_PORT_OUT, A				; 1 cycle
-	nop							; 1 cycle
-	lsr A						; 1 cycle
-	out VIDEO_PORT_OUT, A				; 1 cycle
-	nop							; 1 cycle
-	lsr A						; 1 cycle
-	out VIDEO_PORT_OUT, A				; 1 cycle
-	nop							; 1 cycle
-	lsr A						; 1 cycle
-	out VIDEO_PORT_OUT, A				; 1 cycle
-	nop							; 1 cycle
-	lsr A						; 1 cycle
-	out VIDEO_PORT_OUT, A				; 1 cycle
-	nop							; 1 cycle
-	lsr A						; 1 cycle
-	out VIDEO_PORT_OUT, A				; 1 cycle
-	nop							; 1 cycle
-	lsr A						; 1 cycle
-	out VIDEO_PORT_OUT, A				; 1 cycle
-	nop							; 1 cycle
-	lsr A						; 1 cycle
-	out VIDEO_PORT_OUT, A				; 1 cycle
-
-	; chunk 15
-	ld A, X+	; load pixel	; 2 cycles
-	out VIDEO_PORT_OUT, A				; 1 cycle
-	nop							; 1 cycle
-	lsr A						; 1 cycle
-	out VIDEO_PORT_OUT, A				; 1 cycle
-	nop							; 1 cycle
-	lsr A						; 1 cycle
-	out VIDEO_PORT_OUT, A				; 1 cycle
-	nop							; 1 cycle
-	lsr A						; 1 cycle
-	out VIDEO_PORT_OUT, A				; 1 cycle
-	nop							; 1 cycle
-	lsr A						; 1 cycle
-	out VIDEO_PORT_OUT, A				; 1 cycle
-	nop							; 1 cycle
-	lsr A						; 1 cycle
-	out VIDEO_PORT_OUT, A				; 1 cycle
-	nop							; 1 cycle
-	lsr A						; 1 cycle
-	out VIDEO_PORT_OUT, A				; 1 cycle
-	nop							; 1 cycle
-	lsr A						; 1 cycle
-	out VIDEO_PORT_OUT, A				; 1 cycle
-
-	; chunk 16
-	ld A, X+	; load pixel	; 2 cycles
-	out VIDEO_PORT_OUT, A				; 1 cycle
-	nop							; 1 cycle
-	lsr A						; 1 cycle
-	out VIDEO_PORT_OUT, A				; 1 cycle
-	nop							; 1 cycle
-	lsr A						; 1 cycle
-	out VIDEO_PORT_OUT, A				; 1 cycle
-	nop							; 1 cycle
-	lsr A						; 1 cycle
-	out VIDEO_PORT_OUT, A				; 1 cycle
-	nop							; 1 cycle
-	lsr A						; 1 cycle
-	out VIDEO_PORT_OUT, A				; 1 cycle
-	nop							; 1 cycle
-	lsr A						; 1 cycle
-	out VIDEO_PORT_OUT, A				; 1 cycle
-	nop							; 1 cycle
-	lsr A						; 1 cycle
-	out VIDEO_PORT_OUT, A				; 1 cycle
-	nop							; 1 cycle
-	lsr A						; 1 cycle
-	out VIDEO_PORT_OUT, A				; 1 cycle
-
-	; chunk 17
-	ld A, X+	; load pixel	; 2 cycles
-	out VIDEO_PORT_OUT, A				; 1 cycle
-	nop							; 1 cycle
-	lsr A						; 1 cycle
-	out VIDEO_PORT_OUT, A				; 1 cycle
-	nop							; 1 cycle
-	lsr A						; 1 cycle
-	out VIDEO_PORT_OUT, A				; 1 cycle
-	nop							; 1 cycle
-	lsr A						; 1 cycle
-	out VIDEO_PORT_OUT, A				; 1 cycle
-	nop							; 1 cycle
-	lsr A						; 1 cycle
-	out VIDEO_PORT_OUT, A				; 1 cycle
-	nop							; 1 cycle
-	lsr A						; 1 cycle
-	out VIDEO_PORT_OUT, A				; 1 cycle
-	nop							; 1 cycle
-	lsr A						; 1 cycle
-	out VIDEO_PORT_OUT, A				; 1 cycle
-	nop							; 1 cycle
-	lsr A						; 1 cycle
-	out VIDEO_PORT_OUT, A				; 1 cycle
-
-	; chunk 18
-	ld A, X+	; load pixel	; 2 cycles
-	out VIDEO_PORT_OUT, A				; 1 cycle
-	nop							; 1 cycle
-	lsr A						; 1 cycle
-	out VIDEO_PORT_OUT, A				; 1 cycle
-	nop							; 1 cycle
-	lsr A						; 1 cycle
-	out VIDEO_PORT_OUT, A				; 1 cycle
-	nop							; 1 cycle
-	lsr A						; 1 cycle
-	out VIDEO_PORT_OUT, A				; 1 cycle
-	nop							; 1 cycle
-	lsr A						; 1 cycle
-	out VIDEO_PORT_OUT, A				; 1 cycle
-	nop							; 1 cycle
-	lsr A						; 1 cycle
-	out VIDEO_PORT_OUT, A				; 1 cycle
-	nop							; 1 cycle
-	lsr A						; 1 cycle
-	out VIDEO_PORT_OUT, A				; 1 cycle
-	nop							; 1 cycle
-	lsr A						; 1 cycle
-	out VIDEO_PORT_OUT, A				; 1 cycle
-
-	; chunk 19
-	ld A, X+	; load pixel	; 2 cycles
-	out VIDEO_PORT_OUT, A				; 1 cycle
-	nop							; 1 cycle
-	lsr A						; 1 cycle
-	out VIDEO_PORT_OUT, A				; 1 cycle
-	nop							; 1 cycle
-	lsr A						; 1 cycle
-	out VIDEO_PORT_OUT, A				; 1 cycle
-	nop							; 1 cycle
-	lsr A						; 1 cycle
-	out VIDEO_PORT_OUT, A				; 1 cycle
-	nop							; 1 cycle
-	lsr A						; 1 cycle
-	out VIDEO_PORT_OUT, A				; 1 cycle
-	nop							; 1 cycle
-	lsr A						; 1 cycle
-	out VIDEO_PORT_OUT, A				; 1 cycle
-	nop							; 1 cycle
-	lsr A						; 1 cycle
-	out VIDEO_PORT_OUT, A				; 1 cycle
-	nop							; 1 cycle
-	lsr A						; 1 cycle
-	out VIDEO_PORT_OUT, A				; 1 cycle
-
-	; chunk 20
-	ld A, X+	; load pixel	; 2 cycles
-	out VIDEO_PORT_OUT, A				; 1 cycle
-	nop							; 1 cycle
-	lsr A						; 1 cycle
-	out VIDEO_PORT_OUT, A				; 1 cycle
-	nop							; 1 cycle
-	lsr A						; 1 cycle
-	out VIDEO_PORT_OUT, A				; 1 cycle
-	nop							; 1 cycle
-	lsr A						; 1 cycle
-	out VIDEO_PORT_OUT, A				; 1 cycle
-	nop							; 1 cycle
-	lsr A						; 1 cycle
-	out VIDEO_PORT_OUT, A				; 1 cycle
-	nop							; 1 cycle
-	lsr A						; 1 cycle
-	out VIDEO_PORT_OUT, A				; 1 cycle
-	nop							; 1 cycle
-	lsr A						; 1 cycle
-	out VIDEO_PORT_OUT, A				; 1 cycle
-	nop							; 1 cycle
-	lsr A						; 1 cycle
-	out VIDEO_PORT_OUT, A				; 1 cycle
-
-	; chunk 21
-	ld A, X+	; load pixel	; 2 cycles
-	out VIDEO_PORT_OUT, A				; 1 cycle
-	nop							; 1 cycle
-	lsr A						; 1 cycle
-	out VIDEO_PORT_OUT, A				; 1 cycle
-	nop							; 1 cycle
-	lsr A						; 1 cycle
-	out VIDEO_PORT_OUT, A				; 1 cycle
-	nop							; 1 cycle
-	lsr A						; 1 cycle
-	out VIDEO_PORT_OUT, A				; 1 cycle
-	nop							; 1 cycle
-	lsr A						; 1 cycle
-	out VIDEO_PORT_OUT, A				; 1 cycle
-	nop							; 1 cycle
-	lsr A						; 1 cycle
-	out VIDEO_PORT_OUT, A				; 1 cycle
-	nop							; 1 cycle
-	lsr A						; 1 cycle
-	out VIDEO_PORT_OUT, A				; 1 cycle
-	nop							; 1 cycle
-	lsr A						; 1 cycle
-	out VIDEO_PORT_OUT, A				; 1 cycle
-
-	; chunk 22
-	ld A, X+	; load pixel	; 2 cycles
-	out VIDEO_PORT_OUT, A				; 1 cycle
-	nop							; 1 cycle
-	lsr A						; 1 cycle
-	out VIDEO_PORT_OUT, A				; 1 cycle
-	nop							; 1 cycle
-	lsr A						; 1 cycle
-	out VIDEO_PORT_OUT, A				; 1 cycle
-	nop							; 1 cycle
-	lsr A						; 1 cycle
-	out VIDEO_PORT_OUT, A				; 1 cycle
-	nop							; 1 cycle
-	lsr A						; 1 cycle
-	out VIDEO_PORT_OUT, A				; 1 cycle
-	nop							; 1 cycle
-	lsr A						; 1 cycle
-	out VIDEO_PORT_OUT, A				; 1 cycle
-	nop							; 1 cycle
-	lsr A						; 1 cycle
-	out VIDEO_PORT_OUT, A				; 1 cycle
-	nop							; 1 cycle
-	lsr A						; 1 cycle
-	out VIDEO_PORT_OUT, A				; 1 cycle
-
-	; chunk 23
-	ld A, X+	; load pixel	; 2 cycles
-	out VIDEO_PORT_OUT, A				; 1 cycle
-	nop							; 1 cycle
-	lsr A						; 1 cycle
-	out VIDEO_PORT_OUT, A				; 1 cycle
-	nop							; 1 cycle
-	lsr A						; 1 cycle
-	out VIDEO_PORT_OUT, A				; 1 cycle
-	nop							; 1 cycle
-	lsr A						; 1 cycle
-	out VIDEO_PORT_OUT, A				; 1 cycle
-	nop							; 1 cycle
-	lsr A						; 1 cycle
-	out VIDEO_PORT_OUT, A				; 1 cycle
-	nop							; 1 cycle
-	lsr A						; 1 cycle
-	out VIDEO_PORT_OUT, A				; 1 cycle
-	nop							; 1 cycle
-	lsr A						; 1 cycle
-	out VIDEO_PORT_OUT, A				; 1 cycle
-	nop							; 1 cycle
-	lsr A						; 1 cycle
-	out VIDEO_PORT_OUT, A				; 1 cycle
-
-	; chunk 24
-	ld A, X+	; load pixel	; 2 cycles
-	out VIDEO_PORT_OUT, A				; 1 cycle
-	nop							; 1 cycle
-	lsr A						; 1 cycle
-	out VIDEO_PORT_OUT, A				; 1 cycle
-	nop							; 1 cycle
-	lsr A						; 1 cycle
-	out VIDEO_PORT_OUT, A				; 1 cycle
-	nop							; 1 cycle
-	lsr A						; 1 cycle
-	out VIDEO_PORT_OUT, A				; 1 cycle
-	nop							; 1 cycle
-	lsr A						; 1 cycle
-	out VIDEO_PORT_OUT, A				; 1 cycle
-	nop							; 1 cycle
-	lsr A						; 1 cycle
-	out VIDEO_PORT_OUT, A				; 1 cycle
-	nop							; 1 cycle
-	lsr A						; 1 cycle
-	out VIDEO_PORT_OUT, A				; 1 cycle
-	nop							; 1 cycle
-	lsr A						; 1 cycle
-	out VIDEO_PORT_OUT, A				; 1 cycle
-
-	; chunk 25
-	ld A, X+	; load pixel	; 2 cycles
-	out VIDEO_PORT_OUT, A				; 1 cycle
-	nop							; 1 cycle
-	lsr A						; 1 cycle
-	out VIDEO_PORT_OUT, A				; 1 cycle
-	nop							; 1 cycle
-	lsr A						; 1 cycle
-	out VIDEO_PORT_OUT, A				; 1 cycle
-	nop							; 1 cycle
-	lsr A						; 1 cycle
-	out VIDEO_PORT_OUT, A				; 1 cycle
-	nop							; 1 cycle
-	lsr A						; 1 cycle
-	out VIDEO_PORT_OUT, A				; 1 cycle
-	nop							; 1 cycle
-	lsr A						; 1 cycle
-	out VIDEO_PORT_OUT, A				; 1 cycle
-	nop							; 1 cycle
-	lsr A						; 1 cycle
-	out VIDEO_PORT_OUT, A				; 1 cycle
-	nop							; 1 cycle
-	lsr A						; 1 cycle
-	out VIDEO_PORT_OUT, A				; 1 cycle
-
-	; chunk 26
-	ld A, X+	; load pixel	; 2 cycles
-	out VIDEO_PORT_OUT, A				; 1 cycle
-	nop							; 1 cycle
-	lsr A						; 1 cycle
-	out VIDEO_PORT_OUT, A				; 1 cycle
-	nop							; 1 cycle
-	lsr A						; 1 cycle
-	out VIDEO_PORT_OUT, A				; 1 cycle
-	nop							; 1 cycle
-	lsr A						; 1 cycle
-	out VIDEO_PORT_OUT, A				; 1 cycle
-	nop							; 1 cycle
-	lsr A						; 1 cycle
-	out VIDEO_PORT_OUT, A				; 1 cycle
-	nop							; 1 cycle
-	lsr A						; 1 cycle
-	out VIDEO_PORT_OUT, A				; 1 cycle
-	nop							; 1 cycle
-	lsr A						; 1 cycle
-	out VIDEO_PORT_OUT, A				; 1 cycle
-	nop							; 1 cycle
-	lsr A						; 1 cycle
-	out VIDEO_PORT_OUT, A				; 1 cycle
-
-	; chunk 27
-	ld A, X+	; load pixel	; 2 cycles
-	out VIDEO_PORT_OUT, A				; 1 cycle
-	nop							; 1 cycle
-	lsr A						; 1 cycle
-	out VIDEO_PORT_OUT, A				; 1 cycle
-	nop							; 1 cycle
-	lsr A						; 1 cycle
-	out VIDEO_PORT_OUT, A				; 1 cycle
-	nop							; 1 cycle
-	lsr A						; 1 cycle
-	out VIDEO_PORT_OUT, A				; 1 cycle
-	nop							; 1 cycle
-	lsr A						; 1 cycle
-	out VIDEO_PORT_OUT, A				; 1 cycle
-	nop							; 1 cycle
-	lsr A						; 1 cycle
-	out VIDEO_PORT_OUT, A				; 1 cycle
-	nop							; 1 cycle
-	lsr A						; 1 cycle
-	out VIDEO_PORT_OUT, A				; 1 cycle
-	nop							; 1 cycle
-	lsr A						; 1 cycle
-	out VIDEO_PORT_OUT, A				; 1 cycle
-
-	; chunk 28
-	ld A, X+	; load pixel	; 2 cycles
-	out VIDEO_PORT_OUT, A				; 1 cycle
-	nop							; 1 cycle
-	lsr A						; 1 cycle
-	out VIDEO_PORT_OUT, A				; 1 cycle
-	nop							; 1 cycle
-	lsr A						; 1 cycle
-	out VIDEO_PORT_OUT, A				; 1 cycle
-	nop							; 1 cycle
-	lsr A						; 1 cycle
-	out VIDEO_PORT_OUT, A				; 1 cycle
-	nop							; 1 cycle
-	lsr A						; 1 cycle
-	out VIDEO_PORT_OUT, A				; 1 cycle
-	nop							; 1 cycle
-	lsr A						; 1 cycle
-	out VIDEO_PORT_OUT, A				; 1 cycle
-	nop							; 1 cycle
-	lsr A						; 1 cycle
-	out VIDEO_PORT_OUT, A				; 1 cycle
-	nop							; 1 cycle
-	lsr A						; 1 cycle
-	out VIDEO_PORT_OUT, A				; 1 cycle
-
-	; chunk 29
-	ld A, X+	; load pixel	; 2 cycles
-	out VIDEO_PORT_OUT, A				; 1 cycle
-	nop							; 1 cycle
-	lsr A						; 1 cycle
-	out VIDEO_PORT_OUT, A				; 1 cycle
-	nop							; 1 cycle
-	lsr A						; 1 cycle
-	out VIDEO_PORT_OUT, A				; 1 cycle
-	nop							; 1 cycle
-	lsr A						; 1 cycle
-	out VIDEO_PORT_OUT, A				; 1 cycle
-	nop							; 1 cycle
-	lsr A						; 1 cycle
-	out VIDEO_PORT_OUT, A				; 1 cycle
-	nop							; 1 cycle
-	lsr A						; 1 cycle
-	out VIDEO_PORT_OUT, A				; 1 cycle
-	nop							; 1 cycle
-	lsr A						; 1 cycle
-	out VIDEO_PORT_OUT, A				; 1 cycle
-	nop							; 1 cycle
-	lsr A						; 1 cycle
-	out VIDEO_PORT_OUT, A				; 1 cycle
-
-	; chunk 30
-	ld A, X+	; load pixel	; 2 cycles
-	out VIDEO_PORT_OUT, A				; 1 cycle
-	nop							; 1 cycle
-	lsr A						; 1 cycle
-	out VIDEO_PORT_OUT, A				; 1 cycle
-	nop							; 1 cycle
-	lsr A						; 1 cycle
-	out VIDEO_PORT_OUT, A				; 1 cycle
-	nop							; 1 cycle
-	lsr A						; 1 cycle
-	out VIDEO_PORT_OUT, A				; 1 cycle
-	nop							; 1 cycle
-	lsr A						; 1 cycle
-	out VIDEO_PORT_OUT, A				; 1 cycle
-	nop							; 1 cycle
-	lsr A						; 1 cycle
-	out VIDEO_PORT_OUT, A				; 1 cycle
-	nop							; 1 cycle
-	lsr A						; 1 cycle
-	out VIDEO_PORT_OUT, A				; 1 cycle
-	nop							; 1 cycle
-	lsr A						; 1 cycle
-	out VIDEO_PORT_OUT, A				; 1 cycle
-
-	; chunk 31
-	ld A, X+	; load pixel	; 2 cycles
-	out VIDEO_PORT_OUT, A				; 1 cycle
-	nop							; 1 cycle
-	lsr A						; 1 cycle
-	out VIDEO_PORT_OUT, A				; 1 cycle
-	nop							; 1 cycle
-	lsr A						; 1 cycle
-	out VIDEO_PORT_OUT, A				; 1 cycle
-	nop							; 1 cycle
-	lsr A						; 1 cycle
-	out VIDEO_PORT_OUT, A				; 1 cycle
-	nop							; 1 cycle
-	lsr A						; 1 cycle
-	out VIDEO_PORT_OUT, A				; 1 cycle
-	nop							; 1 cycle
-	lsr A						; 1 cycle
-	out VIDEO_PORT_OUT, A				; 1 cycle
-	nop							; 1 cycle
-	lsr A						; 1 cycle
-	out VIDEO_PORT_OUT, A				; 1 cycle
-	nop							; 1 cycle
-	lsr A						; 1 cycle
-	out VIDEO_PORT_OUT, A				; 1 cycle
-
-	; chunk 32
-	ld A, X+	; load pixel	; 2 cycles
-	out VIDEO_PORT_OUT, A				; 1 cycle
-	nop							; 1 cycle
-	lsr A						; 1 cycle
-	out VIDEO_PORT_OUT, A				; 1 cycle
-	nop							; 1 cycle
-	lsr A						; 1 cycle
-	out VIDEO_PORT_OUT, A				; 1 cycle
-	nop							; 1 cycle
-	lsr A						; 1 cycle
-	out VIDEO_PORT_OUT, A				; 1 cycle
-	nop							; 1 cycle
-	lsr A						; 1 cycle
-	out VIDEO_PORT_OUT, A				; 1 cycle
-	nop							; 1 cycle
-	lsr A						; 1 cycle
-	out VIDEO_PORT_OUT, A				; 1 cycle
-	nop							; 1 cycle
-	lsr A						; 1 cycle
-	out VIDEO_PORT_OUT, A				; 1 cycle
-	nop							; 1 cycle
-	lsr A						; 1 cycle
-	out VIDEO_PORT_OUT, A				; 1 cycle
-
-	; chunk 33
-	ld A, X+	; load pixel	; 2 cycles
-	out VIDEO_PORT_OUT, A				; 1 cycle
-	nop							; 1 cycle
-	lsr A						; 1 cycle
-	out VIDEO_PORT_OUT, A				; 1 cycle
-	nop							; 1 cycle
-	lsr A						; 1 cycle
-	out VIDEO_PORT_OUT, A				; 1 cycle
-	nop							; 1 cycle
-	lsr A						; 1 cycle
-	out VIDEO_PORT_OUT, A				; 1 cycle
-	nop							; 1 cycle
-	lsr A						; 1 cycle
-	out VIDEO_PORT_OUT, A				; 1 cycle
-	nop							; 1 cycle
-	lsr A						; 1 cycle
-	out VIDEO_PORT_OUT, A				; 1 cycle
-	nop							; 1 cycle
-	lsr A						; 1 cycle
-	out VIDEO_PORT_OUT, A				; 1 cycle
-	nop							; 1 cycle
-	lsr A						; 1 cycle
-	out VIDEO_PORT_OUT, A				; 1 cycle
-
-	; chunk 34
-	ld A, X+	; load pixel	; 2 cycles
-	out VIDEO_PORT_OUT, A				; 1 cycle
-	nop							; 1 cycle
-	lsr A						; 1 cycle
-	out VIDEO_PORT_OUT, A				; 1 cycle
-	nop							; 1 cycle
-	lsr A						; 1 cycle
-	out VIDEO_PORT_OUT, A				; 1 cycle
-	nop							; 1 cycle
-	lsr A						; 1 cycle
-	out VIDEO_PORT_OUT, A				; 1 cycle
-	nop							; 1 cycle
-	lsr A						; 1 cycle
-	out VIDEO_PORT_OUT, A				; 1 cycle
-	nop							; 1 cycle
-	lsr A						; 1 cycle
-	out VIDEO_PORT_OUT, A				; 1 cycle
-	nop							; 1 cycle
-	lsr A						; 1 cycle
-	out VIDEO_PORT_OUT, A				; 1 cycle
-	nop							; 1 cycle
-	lsr A						; 1 cycle
-	out VIDEO_PORT_OUT, A				; 1 cycle
-
-	; chunk 35
-	ld A, X+	; load pixel	; 2 cycles
-	out VIDEO_PORT_OUT, A				; 1 cycle
-	nop							; 1 cycle
-	lsr A						; 1 cycle
-	out VIDEO_PORT_OUT, A				; 1 cycle
-	nop							; 1 cycle
-	lsr A						; 1 cycle
-	out VIDEO_PORT_OUT, A				; 1 cycle
-	nop							; 1 cycle
-	lsr A						; 1 cycle
-	out VIDEO_PORT_OUT, A				; 1 cycle
-	nop							; 1 cycle
-	lsr A						; 1 cycle
-	out VIDEO_PORT_OUT, A				; 1 cycle
-	nop							; 1 cycle
-	lsr A						; 1 cycle
-	out VIDEO_PORT_OUT, A				; 1 cycle
-	nop							; 1 cycle
-	lsr A						; 1 cycle
-	out VIDEO_PORT_OUT, A				; 1 cycle
-	nop							; 1 cycle
-	lsr A						; 1 cycle
-	out VIDEO_PORT_OUT, A				; 1 cycle
-
-	; chunk 36
-	ld A, X+	; load pixel	; 2 cycles
-	out VIDEO_PORT_OUT, A				; 1 cycle
-	nop							; 1 cycle
-	lsr A						; 1 cycle
-	out VIDEO_PORT_OUT, A				; 1 cycle
-	nop							; 1 cycle
-	lsr A						; 1 cycle
-	out VIDEO_PORT_OUT, A				; 1 cycle
-	nop							; 1 cycle
-	lsr A						; 1 cycle
-	out VIDEO_PORT_OUT, A				; 1 cycle
-	nop							; 1 cycle
-	lsr A						; 1 cycle
-	out VIDEO_PORT_OUT, A				; 1 cycle
-	nop							; 1 cycle
-	lsr A						; 1 cycle
-	out VIDEO_PORT_OUT, A				; 1 cycle
-	nop							; 1 cycle
-	lsr A						; 1 cycle
-	out VIDEO_PORT_OUT, A				; 1 cycle
-	nop							; 1 cycle
-	lsr A						; 1 cycle
-	out VIDEO_PORT_OUT, A				; 1 cycle
-
-	; chunk 37
-	ld A, X+	; load pixel	; 2 cycles
-	out VIDEO_PORT_OUT, A				; 1 cycle
-	nop							; 1 cycle
-	lsr A						; 1 cycle
-	out VIDEO_PORT_OUT, A				; 1 cycle
-	nop							; 1 cycle
-	lsr A						; 1 cycle
-	out VIDEO_PORT_OUT, A				; 1 cycle
-	nop							; 1 cycle
-	lsr A						; 1 cycle
-	out VIDEO_PORT_OUT, A				; 1 cycle
-	nop							; 1 cycle
-	lsr A						; 1 cycle
-	out VIDEO_PORT_OUT, A				; 1 cycle
-	nop							; 1 cycle
-	lsr A						; 1 cycle
-	out VIDEO_PORT_OUT, A				; 1 cycle
-	nop							; 1 cycle
-	lsr A						; 1 cycle
-	out VIDEO_PORT_OUT, A				; 1 cycle
-	nop							; 1 cycle
-	lsr A						; 1 cycle
-	out VIDEO_PORT_OUT, A				; 1 cycle
-
-	; chunk 38
-	ld A, X+	; load pixel	; 2 cycles
-	out VIDEO_PORT_OUT, A				; 1 cycle
-	nop							; 1 cycle
-	lsr A						; 1 cycle
-	out VIDEO_PORT_OUT, A				; 1 cycle
-	nop							; 1 cycle
-	lsr A						; 1 cycle
-	out VIDEO_PORT_OUT, A				; 1 cycle
-	nop							; 1 cycle
-	lsr A						; 1 cycle
-	out VIDEO_PORT_OUT, A				; 1 cycle
-	nop							; 1 cycle
-	lsr A						; 1 cycle
-	out VIDEO_PORT_OUT, A				; 1 cycle
-	nop							; 1 cycle
-	lsr A						; 1 cycle
-	out VIDEO_PORT_OUT, A				; 1 cycle
-	nop							; 1 cycle
-	lsr A						; 1 cycle
-	out VIDEO_PORT_OUT, A				; 1 cycle
-	nop							; 1 cycle
-	lsr A						; 1 cycle
-	out VIDEO_PORT_OUT, A				; 1 cycle
-
-	; chunk 39
-	ld A, X+	; load pixel	; 2 cycles
-	out VIDEO_PORT_OUT, A				; 1 cycle
-	nop							; 1 cycle
-	lsr A						; 1 cycle
-	out VIDEO_PORT_OUT, A				; 1 cycle
-	nop							; 1 cycle
-	lsr A						; 1 cycle
-	out VIDEO_PORT_OUT, A				; 1 cycle
-	nop							; 1 cycle
-	lsr A						; 1 cycle
-	out VIDEO_PORT_OUT, A				; 1 cycle
-	nop							; 1 cycle
-	lsr A						; 1 cycle
-	out VIDEO_PORT_OUT, A				; 1 cycle
-	nop							; 1 cycle
-	lsr A						; 1 cycle
-	out VIDEO_PORT_OUT, A				; 1 cycle
-	nop							; 1 cycle
-	lsr A						; 1 cycle
-	out VIDEO_PORT_OUT, A				; 1 cycle
-	nop							; 1 cycle
-	lsr A						; 1 cycle
-	out VIDEO_PORT_OUT, A				; 1 cycle
-
-	; chunk 40
-	ld A, X+	; load pixel	; 2 cycles
-	out VIDEO_PORT_OUT, A				; 1 cycle
-	nop							; 1 cycle
-	lsr A						; 1 cycle
-	out VIDEO_PORT_OUT, A				; 1 cycle
-	nop							; 1 cycle
-	lsr A						; 1 cycle
-	out VIDEO_PORT_OUT, A				; 1 cycle
-	nop							; 1 cycle
-	lsr A						; 1 cycle
-	out VIDEO_PORT_OUT, A				; 1 cycle
-	nop							; 1 cycle
-	lsr A						; 1 cycle
-	out VIDEO_PORT_OUT, A				; 1 cycle
-	nop							; 1 cycle
-	lsr A						; 1 cycle
-	out VIDEO_PORT_OUT, A				; 1 cycle
-	nop							; 1 cycle
-	lsr A						; 1 cycle
-	out VIDEO_PORT_OUT, A				; 1 cycle
-	nop							; 1 cycle
-	lsr A						; 1 cycle
-	out VIDEO_PORT_OUT, A				; 1 cycle
-
-	; chunk 41
-	ld A, X+	; load pixel	; 2 cycles
-	out VIDEO_PORT_OUT, A				; 1 cycle
-	nop							; 1 cycle
-	lsr A						; 1 cycle
-	out VIDEO_PORT_OUT, A				; 1 cycle
-	nop							; 1 cycle
-	lsr A						; 1 cycle
-	out VIDEO_PORT_OUT, A				; 1 cycle
-	nop							; 1 cycle
-	lsr A						; 1 cycle
-	out VIDEO_PORT_OUT, A				; 1 cycle
-	nop							; 1 cycle
-	lsr A						; 1 cycle
-	out VIDEO_PORT_OUT, A				; 1 cycle
-	nop							; 1 cycle
-	lsr A						; 1 cycle
-	out VIDEO_PORT_OUT, A				; 1 cycle
-	nop							; 1 cycle
-	lsr A						; 1 cycle
-	out VIDEO_PORT_OUT, A				; 1 cycle
-	nop							; 1 cycle
-	lsr A						; 1 cycle
-	out VIDEO_PORT_OUT, A				; 1 cycle
-
-	; chunk 42
-	ld A, X+	; load pixel	; 2 cycles
-	out VIDEO_PORT_OUT, A				; 1 cycle
-	nop							; 1 cycle
-	lsr A						; 1 cycle
-	out VIDEO_PORT_OUT, A				; 1 cycle
-	nop							; 1 cycle
-	lsr A						; 1 cycle
-	out VIDEO_PORT_OUT, A				; 1 cycle
-	nop							; 1 cycle
-	lsr A						; 1 cycle
-	out VIDEO_PORT_OUT, A				; 1 cycle
-	nop							; 1 cycle
-	lsr A						; 1 cycle
-	out VIDEO_PORT_OUT, A				; 1 cycle
-	nop							; 1 cycle
-	lsr A						; 1 cycle
-	out VIDEO_PORT_OUT, A				; 1 cycle
-	nop							; 1 cycle
-	lsr A						; 1 cycle
-	out VIDEO_PORT_OUT, A				; 1 cycle
-	nop							; 1 cycle
-	lsr A						; 1 cycle
-	out VIDEO_PORT_OUT, A				; 1 cycle
-
-	; chunk 43
-	ld A, X+	; load pixel	; 2 cycles
-	out VIDEO_PORT_OUT, A				; 1 cycle
-	nop							; 1 cycle
-	lsr A						; 1 cycle
-	out VIDEO_PORT_OUT, A				; 1 cycle
-	nop							; 1 cycle
-	lsr A						; 1 cycle
-	out VIDEO_PORT_OUT, A				; 1 cycle
-	nop							; 1 cycle
-	lsr A						; 1 cycle
-	out VIDEO_PORT_OUT, A				; 1 cycle
-	nop							; 1 cycle
-	lsr A						; 1 cycle
-	out VIDEO_PORT_OUT, A				; 1 cycle
-	nop							; 1 cycle
-	lsr A						; 1 cycle
-	out VIDEO_PORT_OUT, A				; 1 cycle
-	nop							; 1 cycle
-	lsr A						; 1 cycle
-	out VIDEO_PORT_OUT, A				; 1 cycle
-	nop							; 1 cycle
-	lsr A						; 1 cycle
-	out VIDEO_PORT_OUT, A				; 1 cycle
-
-	; chunk 44
-	ld A, X+	; load pixel	; 2 cycles
-	out VIDEO_PORT_OUT, A				; 1 cycle
-	nop							; 1 cycle
-	lsr A						; 1 cycle
-	out VIDEO_PORT_OUT, A				; 1 cycle
-	nop							; 1 cycle
-	lsr A						; 1 cycle
-	out VIDEO_PORT_OUT, A				; 1 cycle
-	nop							; 1 cycle
-	lsr A						; 1 cycle
-	out VIDEO_PORT_OUT, A				; 1 cycle
-	nop							; 1 cycle
-	lsr A						; 1 cycle
-	out VIDEO_PORT_OUT, A				; 1 cycle
-	nop							; 1 cycle
-	lsr A						; 1 cycle
-	out VIDEO_PORT_OUT, A				; 1 cycle
-	nop							; 1 cycle
-	lsr A						; 1 cycle
-	out VIDEO_PORT_OUT, A				; 1 cycle
-	nop							; 1 cycle
-	lsr A						; 1 cycle
-	out VIDEO_PORT_OUT, A				; 1 cycle
-
-	; chunk 45
-	ld A, X+	; load pixel	; 2 cycles
-	out VIDEO_PORT_OUT, A				; 1 cycle
-	nop							; 1 cycle
-	lsr A						; 1 cycle
-	out VIDEO_PORT_OUT, A				; 1 cycle
-	nop							; 1 cycle
-	lsr A						; 1 cycle
-	out VIDEO_PORT_OUT, A				; 1 cycle
-	nop							; 1 cycle
-	lsr A						; 1 cycle
-	out VIDEO_PORT_OUT, A				; 1 cycle
-	nop							; 1 cycle
-	lsr A						; 1 cycle
-	out VIDEO_PORT_OUT, A				; 1 cycle
-	nop							; 1 cycle
-	lsr A						; 1 cycle
-	out VIDEO_PORT_OUT, A				; 1 cycle
-	nop							; 1 cycle
-	lsr A						; 1 cycle
-	out VIDEO_PORT_OUT, A				; 1 cycle
-	nop							; 1 cycle
-	lsr A						; 1 cycle
-	out VIDEO_PORT_OUT, A				; 1 cycle
-
-	; chunk 46
-	ld A, X+	; load pixel	; 2 cycles
-	out VIDEO_PORT_OUT, A				; 1 cycle
-	nop							; 1 cycle
-	lsr A						; 1 cycle
-	out VIDEO_PORT_OUT, A				; 1 cycle
-	nop							; 1 cycle
-	lsr A						; 1 cycle
-	out VIDEO_PORT_OUT, A				; 1 cycle
-	nop							; 1 cycle
-	lsr A						; 1 cycle
-	out VIDEO_PORT_OUT, A				; 1 cycle
-	nop							; 1 cycle
-	lsr A						; 1 cycle
-	out VIDEO_PORT_OUT, A				; 1 cycle
-	nop							; 1 cycle
-	lsr A						; 1 cycle
-	out VIDEO_PORT_OUT, A				; 1 cycle
-	nop							; 1 cycle
-	lsr A						; 1 cycle
-	out VIDEO_PORT_OUT, A				; 1 cycle
-	nop							; 1 cycle
-	lsr A						; 1 cycle
-	out VIDEO_PORT_OUT, A				; 1 cycle
-
-	; chunk 47
-	ld A, X+	; load pixel	; 2 cycles
-	out VIDEO_PORT_OUT, A				; 1 cycle
-	nop							; 1 cycle
-	lsr A						; 1 cycle
-	out VIDEO_PORT_OUT, A				; 1 cycle
-	nop							; 1 cycle
-	lsr A						; 1 cycle
-	out VIDEO_PORT_OUT, A				; 1 cycle
-	nop							; 1 cycle
-	lsr A						; 1 cycle
-	out VIDEO_PORT_OUT, A				; 1 cycle
-	nop							; 1 cycle
-	lsr A						; 1 cycle
-	out VIDEO_PORT_OUT, A				; 1 cycle
-	nop							; 1 cycle
-	lsr A						; 1 cycle
-	out VIDEO_PORT_OUT, A				; 1 cycle
-	nop							; 1 cycle
-	lsr A						; 1 cycle
-	out VIDEO_PORT_OUT, A				; 1 cycle
-	nop							; 1 cycle
-	lsr A						; 1 cycle
-	out VIDEO_PORT_OUT, A				; 1 cycle
-
-	; chunk 48
-	ld A, X+	; load pixel	; 2 cycles
-	out VIDEO_PORT_OUT, A				; 1 cycle
-	nop							; 1 cycle
-	lsr A						; 1 cycle
-	out VIDEO_PORT_OUT, A				; 1 cycle
-	nop							; 1 cycle
-	lsr A						; 1 cycle
-	out VIDEO_PORT_OUT, A				; 1 cycle
-	nop							; 1 cycle
-	lsr A						; 1 cycle
-	out VIDEO_PORT_OUT, A				; 1 cycle
-	nop							; 1 cycle
-	lsr A						; 1 cycle
-	out VIDEO_PORT_OUT, A				; 1 cycle
-	nop							; 1 cycle
-	lsr A						; 1 cycle
-	out VIDEO_PORT_OUT, A				; 1 cycle
-	nop							; 1 cycle
-	lsr A						; 1 cycle
-	out VIDEO_PORT_OUT, A				; 1 cycle
-	nop							; 1 cycle
-	lsr A						; 1 cycle
-	out VIDEO_PORT_OUT, A				; 1 cycle
-
-	; chunk 49
-	ld A, X+	; load pixel	; 2 cycles
-	out VIDEO_PORT_OUT, A				; 1 cycle
-	nop							; 1 cycle
-	lsr A						; 1 cycle
-	out VIDEO_PORT_OUT, A				; 1 cycle
-	nop							; 1 cycle
-	lsr A						; 1 cycle
-	out VIDEO_PORT_OUT, A				; 1 cycle
-	nop							; 1 cycle
-	lsr A						; 1 cycle
-	out VIDEO_PORT_OUT, A				; 1 cycle
-	nop							; 1 cycle
-	lsr A						; 1 cycle
-	out VIDEO_PORT_OUT, A				; 1 cycle
-	nop							; 1 cycle
-	lsr A						; 1 cycle
-	out VIDEO_PORT_OUT, A				; 1 cycle
-	nop							; 1 cycle
-	lsr A						; 1 cycle
-	out VIDEO_PORT_OUT, A				; 1 cycle
-	nop							; 1 cycle
-	lsr A						; 1 cycle
-	out VIDEO_PORT_OUT, A				; 1 cycle
-
-	; chunk 50
-	ld A, X+	; load pixel	; 2 cycles
-	out VIDEO_PORT_OUT, A				; 1 cycle
-	nop							; 1 cycle
-	lsr A						; 1 cycle
-	out VIDEO_PORT_OUT, A				; 1 cycle
-	nop							; 1 cycle
-	lsr A						; 1 cycle
-	out VIDEO_PORT_OUT, A				; 1 cycle
-	nop							; 1 cycle
-	lsr A						; 1 cycle
-	out VIDEO_PORT_OUT, A				; 1 cycle
-	nop							; 1 cycle
-	lsr A						; 1 cycle
-	out VIDEO_PORT_OUT, A				; 1 cycle
-	nop							; 1 cycle
-	lsr A						; 1 cycle
-	out VIDEO_PORT_OUT, A				; 1 cycle
-	nop							; 1 cycle
-	lsr A						; 1 cycle
-	out VIDEO_PORT_OUT, A				; 1 cycle
-	nop							; 1 cycle
-	lsr A						; 1 cycle
-	out VIDEO_PORT_OUT, A				; 1 cycle
-
-	; chunk 51
-	ld A, X+	; load pixel	; 2 cycles
-	out VIDEO_PORT_OUT, A				; 1 cycle
-	nop							; 1 cycle
-	lsr A						; 1 cycle
-	out VIDEO_PORT_OUT, A				; 1 cycle
-	nop							; 1 cycle
-	lsr A						; 1 cycle
-	out VIDEO_PORT_OUT, A				; 1 cycle
-	nop							; 1 cycle
-	lsr A						; 1 cycle
-	out VIDEO_PORT_OUT, A				; 1 cycle
-	nop							; 1 cycle
-	lsr A						; 1 cycle
-	out VIDEO_PORT_OUT, A				; 1 cycle
-	nop							; 1 cycle
-	lsr A						; 1 cycle
-	out VIDEO_PORT_OUT, A				; 1 cycle
-	nop							; 1 cycle
-	lsr A						; 1 cycle
-	out VIDEO_PORT_OUT, A				; 1 cycle
-	nop							; 1 cycle
-	lsr A						; 1 cycle
-	out VIDEO_PORT_OUT, A				; 1 cycle
-
-	; chunk 52
-	ld A, X+	; load pixel	; 2 cycles
-	out VIDEO_PORT_OUT, A				; 1 cycle
-	nop							; 1 cycle
-	lsr A						; 1 cycle
-	out VIDEO_PORT_OUT, A				; 1 cycle
-	nop							; 1 cycle
-	lsr A						; 1 cycle
-	out VIDEO_PORT_OUT, A				; 1 cycle
-	nop							; 1 cycle
-	lsr A						; 1 cycle
-	out VIDEO_PORT_OUT, A				; 1 cycle
-	nop							; 1 cycle
-	lsr A						; 1 cycle
-	out VIDEO_PORT_OUT, A				; 1 cycle
-	nop							; 1 cycle
-	lsr A						; 1 cycle
-	out VIDEO_PORT_OUT, A				; 1 cycle
-	nop							; 1 cycle
-	lsr A						; 1 cycle
-	out VIDEO_PORT_OUT, A				; 1 cycle
-	nop							; 1 cycle
-	lsr A						; 1 cycle
-	out VIDEO_PORT_OUT, A				; 1 cycle
+	; **** start line back porch: 8uS, 192 cycles @ 24Mhz
+	; leave time at the end for line setup and draw_line call
+	ldi VG_HIGH_ACCUM, DURATION_DELAY_8US/3									; 1 cycle
+	l_sync_back_porch_loop:
+		dec VG_HIGH_ACCUM									; 1 cycle
+		brne l_sync_back_porch_loop  							; 2 cycle if true, 1 if false
+	; **** end back porch
 
+	; 64 chunks of 8 pixels
+	ldi VG_HIGH_ACCUM, 64			; 1 cycle
+	draw_chunk: ; requires 8 cpu cycles
+		ld A, X+	; load chunk	; 2 cycles
+		out VIDEO_PORT_OUT, A		; 1 cycle
+		; TODO: A posto di questi due NOP ci andrebbe un cbi e un sbi per far caricare allo shift register il byte
+		nop							; 1 cycle
+		nop							; 1 cycle
+		dec VG_HIGH_ACCUM			; 1 cycle
+		brne draw_chunk  			; 2 cycle if true, 1 if false
 	ret
+
+draw_empty_line:
+	; video pin goes low before sync
+	clr VG_HIGH_ACCUM										; 1 cycle
+	out VIDEO_PORT_OUT, VG_HIGH_ACCUM						; 1 cycle
+
+	cbi	PORTC, SYNC_PIN	; sync goes low (0v)					; 2 cycle
+	ldi VG_HIGH_ACCUM, DURATION_DELAY_4US/3						; 1 cycle
+	l_sync_pulse_loop: ; requires 3 cpu cycles
+		dec VG_HIGH_ACCUM									; 1 cycle
+		brne l_sync_pulse_loop  								; 2 cycle if true, 1 if false
+	sbi	PORTC, SYNC_PIN	; sync goes high (0.3v)
+	; **** end line sync
+
+	; an empty line: 60 uS of black
+	clr A						; 1 cycle
+	out VIDEO_PORT_OUT, A		; 1 cycle
+	ldi VG_HIGH_ACCUM, 666/3	; 1 cycle
+	draw_empty_line_loop: ; requires 3 cycles
+		dec VG_HIGH_ACCUM			; 1 cycle
+		brne draw_chunk  			; 2 cycle if true, 1 if false
+	ret
\ No newline at end of file