diff --git a/pat80-io-devices/composite-pal-adapter/software/avr-assembly/video_generator.asm b/pat80-io-devices/composite-pal-adapter/software/avr-assembly/video_generator.asm
index 3ef5d22..d6e2dbf 100644
--- a/pat80-io-devices/composite-pal-adapter/software/avr-assembly/video_generator.asm
+++ b/pat80-io-devices/composite-pal-adapter/software/avr-assembly/video_generator.asm
@@ -32,7 +32,7 @@
 .equ TIMER_DELAY_60US = 65535 - 1409 	; 719 cycles @ 24Mhz (minus overhead)
 .equ TIMER_DELAY_30US = 65535 - 690 	; 719 cycles @ 24Mhz (minus overhead)
 .equ TIMER_DELAY_2US = 65535 - 17		; 48 cycles @ 24Mhz (minus overhead)
-.equ TIMER_DELAY_4US = 65535 - 65		; 96 cycles @ 24Mhz (minus overhead)
+.equ TIMER_DELAY_4US = 65535 - 64		; 96 cycles @ 24Mhz (minus overhead)
 .equ BACK_PORCH_DELAY = 234				; 186 cycles back porch + 48 cycles to leave 2 chunks empty (image padding)
 
 
@@ -43,8 +43,8 @@ on_tim1_ovf:
 	sbi PORTD, BUSY_PIN
 	; called by timer 1 two times per line (every 32 uS) during hsync, unless drawing picture.
 	inc STATUS
-	; if STATUS >= 83 then STATUS=0
-	cpi STATUS, 85	; TODO: Added a seventh sync pulse at end of screen because at the first short sync after the image, the timer doesn't tick at the right time
+	; if STATUS >= 176 then STATUS=0
+	cpi STATUS, 178	; TODO: Added a seventh sync pulse at end of screen because at the first short sync after the image, the timer doesn't tick at the right time
 	brlo switch_status
 	clr STATUS
 	; check status and decide what to do
@@ -53,13 +53,12 @@ on_tim1_ovf:
 		brlo long_sync	; 0-9: long sync
 		cpi STATUS, 20
 		brlo short_sync	; 10-19: short sync
-		cpi STATUS, 45
-		brlo empty_line	; 20-45: empty lines
-		cpi STATUS, 45
-		breq start_draw_picture ; 20: draw picture
-		cpi STATUS, 71
-		brlo empty_line	; 46-70 = draw empty lines
-		jmp short_sync  ; 71-82 = short sync
+		cpi STATUS, 92
+		brlo empty_line	; 20-91: empty lines
+		breq start_draw_picture ; 92: draw picture
+		cpi STATUS, 164
+		brlo empty_line	; 93-165 = draw empty lines
+		jmp short_sync  ; 166-177 = short sync
 	; reti is at end of all previous jumps
 
 start_draw_picture:
@@ -1360,10 +1359,10 @@ draw_line:
 	lsr A						; 1 cycle
 	out VIDEO_PORT_OUT, A				; 1 cycle
 
-	; chunk 47, 48, 49 (blank)
+	; blank right margin
 	clr A					; 1 cycle
 	out VIDEO_PORT_OUT, A	; 1 cycle
-	ldi VG_HIGH_ACCUM, 31									; 1 cycle
+	ldi VG_HIGH_ACCUM, 28									; 1 cycle
 	eol_porch_loop: ; requires 3 cpu cycles
 		dec VG_HIGH_ACCUM									; 1 cycle
 		brne eol_porch_loop									; 2 if jumps, 1 if continues