diff --git a/pat80-io-devices/composite-pal-adapter/software/avr-assembly/character_generator.asm b/pat80-io-devices/composite-pal-adapter/software/avr-assembly/character_generator.asm index e28405b..5280842 100644 --- a/pat80-io-devices/composite-pal-adapter/software/avr-assembly/character_generator.asm +++ b/pat80-io-devices/composite-pal-adapter/software/avr-assembly/character_generator.asm @@ -4,7 +4,48 @@ ; ******************************************* ; This module generates the character pixels using the font present in rom -; and adds it on the framebuffer in the position indicated by POS_COARSE. +; and adds it on the framebuffer in the position indicated by POS_COARSE (Y). -; Draws character in register A to the screen at current coords -draw_char: \ No newline at end of file +.equ LINE_COLUMNS = 52 ; number of columns (characters or chunks) per line + +; Draws character in register A to the screen at current coords (Y) +; @param A (r0) ascii code to display +; @modifies r0 (A), r1, r2, r3, r16 (HIGH_ACCUM), Y, Z +draw_char: + ; Glyph's first byte is at: + ; glyph_pointer = font_starting_mem_pos + (ascii_code * number_of_bytes_per_font) + ; But all the fonts are 1 byte large, so a glyph is 1*height bytes: + ; glyph_pointer = FONT + (ascii_code * FONT_HEIGHT) + + ; Save current chunk cursor position (Y) + mov r2, YL + mov r3, YH + + ; Load first glyph position on Z + ldi ZH, high(FONT) + ldi ZL, low(FONT) + ; Obtain offset multiplying ascii_code * number_of_bytes_per_fontr1 + ldi HIGH_ACCUM, FONT_HEIGHT + mul A, HIGH_ACCUM ; result overwrites r0 and r1! + ; 16-bit addition between gliph's first byte position and offset (and store result in Z) + add ZL, A + adc ZH, r1 + ; Z contain our glyph's first byte position: draw it + ; The drawing consist of FONT_HEIGHT cycles. Every glyph byte is placed on its own line + ; on screen. To do this, we place it LINE_COLUMNS bytes after the previous one. + ldi HIGH_ACCUM, FONT_HEIGHT + draw_char_loop: + ; Load glyph line byte from program memory (and point to the next) + lpm r1, Z+ + ; Write glyph line to framebuffer at chunk cursor position (Y) + st Y, r1 + ; Increment chunk cursor position (Y) to next line of the same char column + adiw YH:YL,LINE_COLUMNS + ; Decrement loop counter and exit if reached 0 + dec HIGH_ACCUM + brne draw_char_loop + ; Char drawing is complete. Set chunk cursor position to next char first line + mov YL, r2 ; first restore Y + mov YH, r3 + adiw YH:YL,1 ; just increment pre-char-drawing-saved chunk cursor position by 1 + ret diff --git a/pat80-io-devices/composite-pal-adapter/software/avr-assembly/communication.asm b/pat80-io-devices/composite-pal-adapter/software/avr-assembly/communication.asm index 81b68cf..d16673f 100644 --- a/pat80-io-devices/composite-pal-adapter/software/avr-assembly/communication.asm +++ b/pat80-io-devices/composite-pal-adapter/software/avr-assembly/communication.asm @@ -5,27 +5,25 @@ ; This module manages the communication between Pat80 and ; the video adapter. -; The data port is PORTB. The CLK (clock) signal is on PORTD0 -; and the RS (register select) on PORTD1 ; INTERNAL POINTER: ; Internally, the last screen position is represented by 24 bits in two registers: -; POS_COARSE: Register Z (16-bit, r31 and r30): Coarse position. Points to one of the chunks +; POS_COARSE: Register Y (16-bit, r31 and r30): Coarse position. Points to one of the chunks ; (character columns). 52 chunks per row, 304 rows. Used for character position, as ; 1 chunk = 1 byte = 1 character. ; POS_FINE: Register r24: Fine position. Represents the bit inside the chunk selected by POS_COARSE. -; Ignored in character mode (the character is always aligned to column.) +; Ignored in character mode (the character is always aligned to column). Used in graphic mode. ; Initializes and waits for a byte on PORTB comm_init: call cursor_pos_home ; Set cursor to 0,0 comm_wait_byte: - in r24, PINB ; read PORTB + in A, DATA_PORT_IN ; read PORTB ; Check continuously CLK until a LOW is found sbic PORTD, CLK_PIN jmp comm_wait_byte ; CLK triggered: Copy PORTB to the next framebuffer byte - st Z+, r24 + st Y+, A ; if reached the last framebuffer byte, exit cycle cpi r31, 0b00111110 brne comm_wait_byte ; if not 0, repeat h_picture_loop @@ -35,8 +33,8 @@ comm_init: ; Sets the cursor to 0,0 and clears fine position cursor_pos_home: - ; Set Z to framebuffer start - ldi POS_COARSE_H, high(FRAMEBUFFER<<1) - ldi POS_COARSE_L, low(FRAMEBUFFER<<1) + ; Set Y to framebuffer start + ldi YH, high(FRAMEBUFFER<<1) + ldi YL, low(FRAMEBUFFER<<1) clr POS_FINE ret diff --git a/pat80-io-devices/composite-pal-adapter/software/avr-assembly/font.asm b/pat80-io-devices/composite-pal-adapter/software/avr-assembly/font.asm index bb1e8a0..e40048d 100644 --- a/pat80-io-devices/composite-pal-adapter/software/avr-assembly/font.asm +++ b/pat80-io-devices/composite-pal-adapter/software/avr-assembly/font.asm @@ -1,130 +1,131 @@ +.equ FONT_HEIGHT = 8 + ; Temporary dhepper's font8x8 adaptation (https://github.com/dhepper/font8x8) -FONT: - .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // U+0000 (nul) - .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // U+0001 - .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // U+0002 - .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // U+0003 - .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // U+0004 - .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // U+0005 - .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // U+0006 - .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // U+0007 - .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // U+0008 - .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // U+0009 - .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // U+000A - .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // U+000B - .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // U+000C - .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // U+000D - .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // U+000E - .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // U+000F - .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // U+0010 - .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // U+0011 - .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // U+0012 - .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // U+0013 - .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // U+0014 - .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // U+0015 - .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // U+0016 - .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // U+0017 - .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // U+0018 - .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // U+0019 - .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // U+001A - .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // U+001B - .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // U+001C - .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // U+001D - .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // U+001E - .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // U+001F - .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // U+0020 (space) - .db 0x18, 0x3C, 0x3C, 0x18, 0x18, 0x00, 0x18, 0x00, // U+0021 (!) - .db 0x36, 0x36, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // U+0022 (") - .db 0x36, 0x36, 0x7F, 0x36, 0x7F, 0x36, 0x36, 0x00, // U+0023 (#) - .db 0x0C, 0x3E, 0x03, 0x1E, 0x30, 0x1F, 0x0C, 0x00, // U+0024 ($) - .db 0x00, 0x63, 0x33, 0x18, 0x0C, 0x66, 0x63, 0x00, // U+0025 (%) - .db 0x1C, 0x36, 0x1C, 0x6E, 0x3B, 0x33, 0x6E, 0x00, // U+0026 (&) - .db 0x06, 0x06, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, // U+0027 (') - .db 0x18, 0x0C, 0x06, 0x06, 0x06, 0x0C, 0x18, 0x00, // U+0028 (() - .db 0x06, 0x0C, 0x18, 0x18, 0x18, 0x0C, 0x06, 0x00, // U+0029 ()) - .db 0x00, 0x66, 0x3C, 0xFF, 0x3C, 0x66, 0x00, 0x00, // U+002A (*) - .db 0x00, 0x0C, 0x0C, 0x3F, 0x0C, 0x0C, 0x00, 0x00, // U+002B (+) - .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x0C, 0x0C, 0x06, // U+002C (,) - .db 0x00, 0x00, 0x00, 0x3F, 0x00, 0x00, 0x00, 0x00, // U+002D (-) - .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x0C, 0x0C, 0x00, // U+002E (.) - .db 0x60, 0x30, 0x18, 0x0C, 0x06, 0x03, 0x01, 0x00, // U+002F (/) - .db 0x3E, 0x63, 0x73, 0x7B, 0x6F, 0x67, 0x3E, 0x00, // U+0030 (0) - .db 0x0C, 0x0E, 0x0C, 0x0C, 0x0C, 0x0C, 0x3F, 0x00, // U+0031 (1) - .db 0x1E, 0x33, 0x30, 0x1C, 0x06, 0x33, 0x3F, 0x00, // U+0032 (2) - .db 0x1E, 0x33, 0x30, 0x1C, 0x30, 0x33, 0x1E, 0x00, // U+0033 (3) - .db 0x38, 0x3C, 0x36, 0x33, 0x7F, 0x30, 0x78, 0x00, // U+0034 (4) - .db 0x3F, 0x03, 0x1F, 0x30, 0x30, 0x33, 0x1E, 0x00, // U+0035 (5) - .db 0x1C, 0x06, 0x03, 0x1F, 0x33, 0x33, 0x1E, 0x00, // U+0036 (6) - .db 0x3F, 0x33, 0x30, 0x18, 0x0C, 0x0C, 0x0C, 0x00, // U+0037 (7) - .db 0x1E, 0x33, 0x33, 0x1E, 0x33, 0x33, 0x1E, 0x00, // U+0038 (8) - .db 0x1E, 0x33, 0x33, 0x3E, 0x30, 0x18, 0x0E, 0x00, // U+0039 (9) - .db 0x00, 0x0C, 0x0C, 0x00, 0x00, 0x0C, 0x0C, 0x00, // U+003A (:) - .db 0x00, 0x0C, 0x0C, 0x00, 0x00, 0x0C, 0x0C, 0x06, // U+003B (;) - .db 0x18, 0x0C, 0x06, 0x03, 0x06, 0x0C, 0x18, 0x00, // U+003C (<) - .db 0x00, 0x00, 0x3F, 0x00, 0x00, 0x3F, 0x00, 0x00, // U+003D (=) - .db 0x06, 0x0C, 0x18, 0x30, 0x18, 0x0C, 0x06, 0x00, // U+003E (>) - .db 0x1E, 0x33, 0x30, 0x18, 0x0C, 0x00, 0x0C, 0x00, // U+003F (?) - .db 0x3E, 0x63, 0x7B, 0x7B, 0x7B, 0x03, 0x1E, 0x00, // U+0040 (@) - .db 0x0C, 0x1E, 0x33, 0x33, 0x3F, 0x33, 0x33, 0x00, // U+0041 (A) - .db 0x3F, 0x66, 0x66, 0x3E, 0x66, 0x66, 0x3F, 0x00, // U+0042 (B) - .db 0x3C, 0x66, 0x03, 0x03, 0x03, 0x66, 0x3C, 0x00, // U+0043 (C) - .db 0x1F, 0x36, 0x66, 0x66, 0x66, 0x36, 0x1F, 0x00, // U+0044 (D) - .db 0x7F, 0x46, 0x16, 0x1E, 0x16, 0x46, 0x7F, 0x00, // U+0045 (E) - .db 0x7F, 0x46, 0x16, 0x1E, 0x16, 0x06, 0x0F, 0x00, // U+0046 (F) - .db 0x3C, 0x66, 0x03, 0x03, 0x73, 0x66, 0x7C, 0x00, // U+0047 (G) - .db 0x33, 0x33, 0x33, 0x3F, 0x33, 0x33, 0x33, 0x00, // U+0048 (H) - .db 0x1E, 0x0C, 0x0C, 0x0C, 0x0C, 0x0C, 0x1E, 0x00, // U+0049 (I) - .db 0x78, 0x30, 0x30, 0x30, 0x33, 0x33, 0x1E, 0x00, // U+004A (J) - .db 0x67, 0x66, 0x36, 0x1E, 0x36, 0x66, 0x67, 0x00, // U+004B (K) - .db 0x0F, 0x06, 0x06, 0x06, 0x46, 0x66, 0x7F, 0x00, // U+004C (L) - .db 0x63, 0x77, 0x7F, 0x7F, 0x6B, 0x63, 0x63, 0x00, // U+004D (M) - .db 0x63, 0x67, 0x6F, 0x7B, 0x73, 0x63, 0x63, 0x00, // U+004E (N) - .db 0x1C, 0x36, 0x63, 0x63, 0x63, 0x36, 0x1C, 0x00, // U+004F (O) - .db 0x3F, 0x66, 0x66, 0x3E, 0x06, 0x06, 0x0F, 0x00, // U+0050 (P) - .db 0x1E, 0x33, 0x33, 0x33, 0x3B, 0x1E, 0x38, 0x00, // U+0051 (Q) - .db 0x3F, 0x66, 0x66, 0x3E, 0x36, 0x66, 0x67, 0x00, // U+0052 (R) - .db 0x1E, 0x33, 0x07, 0x0E, 0x38, 0x33, 0x1E, 0x00, // U+0053 (S) - .db 0x3F, 0x2D, 0x0C, 0x0C, 0x0C, 0x0C, 0x1E, 0x00, // U+0054 (T) - .db 0x33, 0x33, 0x33, 0x33, 0x33, 0x33, 0x3F, 0x00, // U+0055 (U) - .db 0x33, 0x33, 0x33, 0x33, 0x33, 0x1E, 0x0C, 0x00, // U+0056 (V) - .db 0x63, 0x63, 0x63, 0x6B, 0x7F, 0x77, 0x63, 0x00, // U+0057 (W) - .db 0x63, 0x63, 0x36, 0x1C, 0x1C, 0x36, 0x63, 0x00, // U+0058 (X) - .db 0x33, 0x33, 0x33, 0x1E, 0x0C, 0x0C, 0x1E, 0x00, // U+0059 (Y) - .db 0x7F, 0x63, 0x31, 0x18, 0x4C, 0x66, 0x7F, 0x00, // U+005A (Z) - .db 0x1E, 0x06, 0x06, 0x06, 0x06, 0x06, 0x1E, 0x00, // U+005B ([) - .db 0x03, 0x06, 0x0C, 0x18, 0x30, 0x60, 0x40, 0x00, // U+005C (\) - .db 0x1E, 0x18, 0x18, 0x18, 0x18, 0x18, 0x1E, 0x00, // U+005D (]) - .db 0x08, 0x1C, 0x36, 0x63, 0x00, 0x00, 0x00, 0x00, // U+005E (^) - .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xFF, // U+005F (_) - .db 0x0C, 0x0C, 0x18, 0x00, 0x00, 0x00, 0x00, 0x00, // U+0060 (`) - .db 0x00, 0x00, 0x1E, 0x30, 0x3E, 0x33, 0x6E, 0x00, // U+0061 (a) - .db 0x07, 0x06, 0x06, 0x3E, 0x66, 0x66, 0x3B, 0x00, // U+0062 (b) - .db 0x00, 0x00, 0x1E, 0x33, 0x03, 0x33, 0x1E, 0x00, // U+0063 (c) - .db 0x38, 0x30, 0x30, 0x3e, 0x33, 0x33, 0x6E, 0x00, // U+0064 (d) - .db 0x00, 0x00, 0x1E, 0x33, 0x3f, 0x03, 0x1E, 0x00, // U+0065 (e) - .db 0x1C, 0x36, 0x06, 0x0f, 0x06, 0x06, 0x0F, 0x00, // U+0066 (f) - .db 0x00, 0x00, 0x6E, 0x33, 0x33, 0x3E, 0x30, 0x1F, // U+0067 (g) - .db 0x07, 0x06, 0x36, 0x6E, 0x66, 0x66, 0x67, 0x00, // U+0068 (h) - .db 0x0C, 0x00, 0x0E, 0x0C, 0x0C, 0x0C, 0x1E, 0x00, // U+0069 (i) - .db 0x30, 0x00, 0x30, 0x30, 0x30, 0x33, 0x33, 0x1E, // U+006A (j) - .db 0x07, 0x06, 0x66, 0x36, 0x1E, 0x36, 0x67, 0x00, // U+006B (k) - .db 0x0E, 0x0C, 0x0C, 0x0C, 0x0C, 0x0C, 0x1E, 0x00, // U+006C (l) - .db 0x00, 0x00, 0x33, 0x7F, 0x7F, 0x6B, 0x63, 0x00, // U+006D (m) - .db 0x00, 0x00, 0x1F, 0x33, 0x33, 0x33, 0x33, 0x00, // U+006E (n) - .db 0x00, 0x00, 0x1E, 0x33, 0x33, 0x33, 0x1E, 0x00, // U+006F (o) - .db 0x00, 0x00, 0x3B, 0x66, 0x66, 0x3E, 0x06, 0x0F, // U+0070 (p) - .db 0x00, 0x00, 0x6E, 0x33, 0x33, 0x3E, 0x30, 0x78, // U+0071 (q) - .db 0x00, 0x00, 0x3B, 0x6E, 0x66, 0x06, 0x0F, 0x00, // U+0072 (r) - .db 0x00, 0x00, 0x3E, 0x03, 0x1E, 0x30, 0x1F, 0x00, // U+0073 (s) - .db 0x08, 0x0C, 0x3E, 0x0C, 0x0C, 0x2C, 0x18, 0x00, // U+0074 (t) - .db 0x00, 0x00, 0x33, 0x33, 0x33, 0x33, 0x6E, 0x00, // U+0075 (u) - .db 0x00, 0x00, 0x33, 0x33, 0x33, 0x1E, 0x0C, 0x00, // U+0076 (v) - .db 0x00, 0x00, 0x63, 0x6B, 0x7F, 0x7F, 0x36, 0x00, // U+0077 (w) - .db 0x00, 0x00, 0x63, 0x36, 0x1C, 0x36, 0x63, 0x00, // U+0078 (x) - .db 0x00, 0x00, 0x33, 0x33, 0x33, 0x3E, 0x30, 0x1F, // U+0079 (y) - .db 0x00, 0x00, 0x3F, 0x19, 0x0C, 0x26, 0x3F, 0x00, // U+007A (z) - .db 0x38, 0x0C, 0x0C, 0x07, 0x0C, 0x0C, 0x38, 0x00, // U+007B ({) - .db 0x18, 0x18, 0x18, 0x00, 0x18, 0x18, 0x18, 0x00, // U+007C (|) - .db 0x07, 0x0C, 0x0C, 0x38, 0x0C, 0x0C, 0x07, 0x00, // U+007D (}) - .db 0x6E, 0x3B, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // U+007E (~) - .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 // U+007F \ No newline at end of file +FONT: .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, ; U+0000 (nul) +.db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, ; U+0001 +.db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, ; U+0002 +.db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, ; U+0003 +.db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, ; U+0004 +.db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, ; U+0005 +.db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, ; U+0006 +.db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, ; U+0007 +.db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, ; U+0008 +.db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, ; U+0009 +.db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, ; U+000A +.db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, ; U+000B +.db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, ; U+000C +.db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, ; U+000D +.db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, ; U+000E +.db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, ; U+000F +.db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, ; U+0010 +.db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, ; U+0011 +.db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, ; U+0012 +.db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, ; U+0013 +.db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, ; U+0014 +.db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, ; U+0015 +.db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, ; U+0016 +.db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, ; U+0017 +.db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, ; U+0018 +.db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, ; U+0019 +.db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, ; U+001A +.db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, ; U+001B +.db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, ; U+001C +.db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, ; U+001D +.db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, ; U+001E +.db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, ; U+001F +.db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, ; U+0020 (space) +.db 0x18, 0x3C, 0x3C, 0x18, 0x18, 0x00, 0x18, 0x00, ; U+0021 (!) +.db 0x36, 0x36, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, ; U+0022 (") +.db 0x36, 0x36, 0x7F, 0x36, 0x7F, 0x36, 0x36, 0x00, ; U+0023 (#) +.db 0x0C, 0x3E, 0x03, 0x1E, 0x30, 0x1F, 0x0C, 0x00, ; U+0024 ($) +.db 0x00, 0x63, 0x33, 0x18, 0x0C, 0x66, 0x63, 0x00, ; U+0025 (%) +.db 0x1C, 0x36, 0x1C, 0x6E, 0x3B, 0x33, 0x6E, 0x00, ; U+0026 (&) +.db 0x06, 0x06, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, ; U+0027 (') +.db 0x18, 0x0C, 0x06, 0x06, 0x06, 0x0C, 0x18, 0x00, ; U+0028 (() +.db 0x06, 0x0C, 0x18, 0x18, 0x18, 0x0C, 0x06, 0x00, ; U+0029 ()) +.db 0x00, 0x66, 0x3C, 0xFF, 0x3C, 0x66, 0x00, 0x00, ; U+002A (*) +.db 0x00, 0x0C, 0x0C, 0x3F, 0x0C, 0x0C, 0x00, 0x00, ; U+002B (+) +.db 0x00, 0x00, 0x00, 0x00, 0x00, 0x0C, 0x0C, 0x06, ; U+002C (,) +.db 0x00, 0x00, 0x00, 0x3F, 0x00, 0x00, 0x00, 0x00, ; U+002D (-) +.db 0x00, 0x00, 0x00, 0x00, 0x00, 0x0C, 0x0C, 0x00, ; U+002E (.) +.db 0x60, 0x30, 0x18, 0x0C, 0x06, 0x03, 0x01, 0x00, ; U+002F (/) +.db 0x3E, 0x63, 0x73, 0x7B, 0x6F, 0x67, 0x3E, 0x00, ; U+0030 (0) +.db 0x0C, 0x0E, 0x0C, 0x0C, 0x0C, 0x0C, 0x3F, 0x00, ; U+0031 (1) +.db 0x1E, 0x33, 0x30, 0x1C, 0x06, 0x33, 0x3F, 0x00, ; U+0032 (2) +.db 0x1E, 0x33, 0x30, 0x1C, 0x30, 0x33, 0x1E, 0x00, ; U+0033 (3) +.db 0x38, 0x3C, 0x36, 0x33, 0x7F, 0x30, 0x78, 0x00, ; U+0034 (4) +.db 0x3F, 0x03, 0x1F, 0x30, 0x30, 0x33, 0x1E, 0x00, ; U+0035 (5) +.db 0x1C, 0x06, 0x03, 0x1F, 0x33, 0x33, 0x1E, 0x00, ; U+0036 (6) +.db 0x3F, 0x33, 0x30, 0x18, 0x0C, 0x0C, 0x0C, 0x00, ; U+0037 (7) +.db 0x1E, 0x33, 0x33, 0x1E, 0x33, 0x33, 0x1E, 0x00, ; U+0038 (8) +.db 0x1E, 0x33, 0x33, 0x3E, 0x30, 0x18, 0x0E, 0x00, ; U+0039 (9) +.db 0x00, 0x0C, 0x0C, 0x00, 0x00, 0x0C, 0x0C, 0x00, ; U+003A (:) +.db 0x00, 0x0C, 0x0C, 0x00, 0x00, 0x0C, 0x0C, 0x06, ; U+003B (;) +.db 0x18, 0x0C, 0x06, 0x03, 0x06, 0x0C, 0x18, 0x00, ; U+003C (<) +.db 0x00, 0x00, 0x3F, 0x00, 0x00, 0x3F, 0x00, 0x00, ; U+003D (=) +.db 0x06, 0x0C, 0x18, 0x30, 0x18, 0x0C, 0x06, 0x00, ; U+003E (>) +.db 0x1E, 0x33, 0x30, 0x18, 0x0C, 0x00, 0x0C, 0x00, ; U+003F (?) +.db 0x3E, 0x63, 0x7B, 0x7B, 0x7B, 0x03, 0x1E, 0x00, ; U+0040 (@) +.db 0x0C, 0x1E, 0x33, 0x33, 0x3F, 0x33, 0x33, 0x00, ; U+0041 (A) +.db 0x3F, 0x66, 0x66, 0x3E, 0x66, 0x66, 0x3F, 0x00, ; U+0042 (B) +.db 0x3C, 0x66, 0x03, 0x03, 0x03, 0x66, 0x3C, 0x00, ; U+0043 (C) +.db 0x1F, 0x36, 0x66, 0x66, 0x66, 0x36, 0x1F, 0x00, ; U+0044 (D) +.db 0x7F, 0x46, 0x16, 0x1E, 0x16, 0x46, 0x7F, 0x00, ; U+0045 (E) +.db 0x7F, 0x46, 0x16, 0x1E, 0x16, 0x06, 0x0F, 0x00, ; U+0046 (F) +.db 0x3C, 0x66, 0x03, 0x03, 0x73, 0x66, 0x7C, 0x00, ; U+0047 (G) +.db 0x33, 0x33, 0x33, 0x3F, 0x33, 0x33, 0x33, 0x00, ; U+0048 (H) +.db 0x1E, 0x0C, 0x0C, 0x0C, 0x0C, 0x0C, 0x1E, 0x00, ; U+0049 (I) +.db 0x78, 0x30, 0x30, 0x30, 0x33, 0x33, 0x1E, 0x00, ; U+004A (J) +.db 0x67, 0x66, 0x36, 0x1E, 0x36, 0x66, 0x67, 0x00, ; U+004B (K) +.db 0x0F, 0x06, 0x06, 0x06, 0x46, 0x66, 0x7F, 0x00, ; U+004C (L) +.db 0x63, 0x77, 0x7F, 0x7F, 0x6B, 0x63, 0x63, 0x00, ; U+004D (M) +.db 0x63, 0x67, 0x6F, 0x7B, 0x73, 0x63, 0x63, 0x00, ; U+004E (N) +.db 0x1C, 0x36, 0x63, 0x63, 0x63, 0x36, 0x1C, 0x00, ; U+004F (O) +.db 0x3F, 0x66, 0x66, 0x3E, 0x06, 0x06, 0x0F, 0x00, ; U+0050 (P) +.db 0x1E, 0x33, 0x33, 0x33, 0x3B, 0x1E, 0x38, 0x00, ; U+0051 (Q) +.db 0x3F, 0x66, 0x66, 0x3E, 0x36, 0x66, 0x67, 0x00, ; U+0052 (R) +.db 0x1E, 0x33, 0x07, 0x0E, 0x38, 0x33, 0x1E, 0x00, ; U+0053 (S) +.db 0x3F, 0x2D, 0x0C, 0x0C, 0x0C, 0x0C, 0x1E, 0x00, ; U+0054 (T) +.db 0x33, 0x33, 0x33, 0x33, 0x33, 0x33, 0x3F, 0x00, ; U+0055 (U) +.db 0x33, 0x33, 0x33, 0x33, 0x33, 0x1E, 0x0C, 0x00, ; U+0056 (V) +.db 0x63, 0x63, 0x63, 0x6B, 0x7F, 0x77, 0x63, 0x00, ; U+0057 (W) +.db 0x63, 0x63, 0x36, 0x1C, 0x1C, 0x36, 0x63, 0x00, ; U+0058 (X) +.db 0x33, 0x33, 0x33, 0x1E, 0x0C, 0x0C, 0x1E, 0x00, ; U+0059 (Y) +.db 0x7F, 0x63, 0x31, 0x18, 0x4C, 0x66, 0x7F, 0x00, ; U+005A (Y) +.db 0x1E, 0x06, 0x06, 0x06, 0x06, 0x06, 0x1E, 0x00, ; U+005B ([) +.db 0x03, 0x06, 0x0C, 0x18, 0x30, 0x60, 0x40, 0x00, ; U+005C (\) +.db 0x1E, 0x18, 0x18, 0x18, 0x18, 0x18, 0x1E, 0x00, ; U+005D (]) +.db 0x08, 0x1C, 0x36, 0x63, 0x00, 0x00, 0x00, 0x00, ; U+005E (^) +.db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xFF, ; U+005F (_) +.db 0x0C, 0x0C, 0x18, 0x00, 0x00, 0x00, 0x00, 0x00, ; U+0060 (`) +.db 0x00, 0x00, 0x1E, 0x30, 0x3E, 0x33, 0x6E, 0x00, ; U+0061 (a) +.db 0x07, 0x06, 0x06, 0x3E, 0x66, 0x66, 0x3B, 0x00, ; U+0062 (b) +.db 0x00, 0x00, 0x1E, 0x33, 0x03, 0x33, 0x1E, 0x00, ; U+0063 (c) +.db 0x38, 0x30, 0x30, 0x3e, 0x33, 0x33, 0x6E, 0x00, ; U+0064 (d) +.db 0x00, 0x00, 0x1E, 0x33, 0x3f, 0x03, 0x1E, 0x00, ; U+0065 (e) +.db 0x1C, 0x36, 0x06, 0x0f, 0x06, 0x06, 0x0F, 0x00, ; U+0066 (f) +.db 0x00, 0x00, 0x6E, 0x33, 0x33, 0x3E, 0x30, 0x1F, ; U+0067 (g) +.db 0x07, 0x06, 0x36, 0x6E, 0x66, 0x66, 0x67, 0x00, ; U+0068 (h) +.db 0x0C, 0x00, 0x0E, 0x0C, 0x0C, 0x0C, 0x1E, 0x00, ; U+0069 (i) +.db 0x30, 0x00, 0x30, 0x30, 0x30, 0x33, 0x33, 0x1E, ; U+006A (j) +.db 0x07, 0x06, 0x66, 0x36, 0x1E, 0x36, 0x67, 0x00, ; U+006B (k) +.db 0x0E, 0x0C, 0x0C, 0x0C, 0x0C, 0x0C, 0x1E, 0x00, ; U+006C (l) +.db 0x00, 0x00, 0x33, 0x7F, 0x7F, 0x6B, 0x63, 0x00, ; U+006D (m) +.db 0x00, 0x00, 0x1F, 0x33, 0x33, 0x33, 0x33, 0x00, ; U+006E (n) +.db 0x00, 0x00, 0x1E, 0x33, 0x33, 0x33, 0x1E, 0x00, ; U+006F (o) +.db 0x00, 0x00, 0x3B, 0x66, 0x66, 0x3E, 0x06, 0x0F, ; U+0070 (p) +.db 0x00, 0x00, 0x6E, 0x33, 0x33, 0x3E, 0x30, 0x78, ; U+0071 (q) +.db 0x00, 0x00, 0x3B, 0x6E, 0x66, 0x06, 0x0F, 0x00, ; U+0072 (r) +.db 0x00, 0x00, 0x3E, 0x03, 0x1E, 0x30, 0x1F, 0x00, ; U+0073 (s) +.db 0x08, 0x0C, 0x3E, 0x0C, 0x0C, 0x2C, 0x18, 0x00, ; U+0074 (t) +.db 0x00, 0x00, 0x33, 0x33, 0x33, 0x33, 0x6E, 0x00, ; U+0075 (u) +.db 0x00, 0x00, 0x33, 0x33, 0x33, 0x1E, 0x0C, 0x00, ; U+0076 (v) +.db 0x00, 0x00, 0x63, 0x6B, 0x7F, 0x7F, 0x36, 0x00, ; U+0077 (w) +.db 0x00, 0x00, 0x63, 0x36, 0x1C, 0x36, 0x63, 0x00, ; U+0078 (x) +.db 0x00, 0x00, 0x33, 0x33, 0x33, 0x3E, 0x30, 0x1F, ; U+0079 (y) +.db 0x00, 0x00, 0x3F, 0x19, 0x0C, 0x26, 0x3F, 0x00, ; U+007A (z) +.db 0x38, 0x0C, 0x0C, 0x07, 0x0C, 0x0C, 0x38, 0x00, ; U+007B ({) +.db 0x18, 0x18, 0x18, 0x00, 0x18, 0x18, 0x18, 0x00, ; U+007C (|) +.db 0x07, 0x0C, 0x0C, 0x38, 0x0C, 0x0C, 0x07, 0x00, ; U+007D (}) +.db 0x6E, 0x3B, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, ; U+007E (~) +.db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 ; U+007F \ No newline at end of file diff --git a/pat80-io-devices/composite-pal-adapter/software/avr-assembly/main.asm b/pat80-io-devices/composite-pal-adapter/software/avr-assembly/main.asm index 33d8292..12b354c 100644 --- a/pat80-io-devices/composite-pal-adapter/software/avr-assembly/main.asm +++ b/pat80-io-devices/composite-pal-adapter/software/avr-assembly/main.asm @@ -8,14 +8,21 @@ ; If the busy pin is high, retry reading until goes low. When the busy pin goes low, we have... TODO ; ; ELECTRONICALLY: -; The data port D0 (= PB0) is tied to ground with a 1KOhm resistance. When the MC is busy drawing the screen, the data port is in +; The data port PB0 is tied to ground with a 1KOhm resistance. When the MC is busy drawing the screen, the data port is in ; high impedance state, so that avoids causing bus contention, but when read returns a 0bXXXXXXX0 byte. When the MC starts vsync, ; begins checking the port for data... TODO ; ; PINS: -; Video pin: PA0 (pin 1) -; Sync pin: PC0 (pin 22) -; Debug hsync pin: PC1 (pin 23) +; Video: +; Video pin: PA0 (pin 1) (but all PORTA is used) +; Sync pin: PC0 (pin 22) +; Communication: +; Data port is PORTB [INPUT] +; CLK (clock) signal is on PORTD0 [INPUT] +; RS (register select) on PORTD1 [INPUT] +; BUSY signal is on PORTD2 [OUTPUT] +; Debug: +; Debug hsync single pulse on pin: PC1 (pin 23) (may be disabled) ; .include "m1284def.inc" ; Atmega 1280 device definition @@ -23,14 +30,21 @@ ; reserved registers .def A = r0 ; accumulator .def STATUS = r25 ; signal status (see STATUS TABLE) -.def POS_COARSE = Z ; coarse position (aligned to character column) -.def POS_COARSE_H = r31 -.def POS_COARSE_L = r30 +;POS_COARSE = Y ; coarse position (aligned to character column) +;DRAWING_BYTE = X ; coarse position (aligned to character column) .def POS_FINE = r24 ; fine position (bit inside coarse-position-pointed byte) +.def LINE_COUNTER = r23 ; fine position (bit inside coarse-position-pointed byte) +.def VG_HIGH_ACCUM = r22 ; an accumulator in high registers to be used only by video_generator in interrupt +.def HIGH_ACCUM = r16 ; an accumulator in high registers to be used outside of interrupts + ; define constant +.equ VIDEO_PORT_OUT = PORTA ; Used all PORTA, but connected only PA0 .equ SYNC_PIN = PC0 ; Sync pin (pin 22) .equ DEBUG_PIN = PC1 ; DEBUG: Single vertical sync pulse to trigger oscilloscope (pin 23) -.equ CLK_PIN = PD7 +.equ DATA_PORT_IN = PINB +.equ CLK_PIN = PD0 +.equ RS_PIN = PD1 +.equ BUSY_PIN = PD2 ; memory .equ FRAMEBUFFER = 0x100 @@ -47,25 +61,26 @@ main: ; pins setup sbi DDRC, SYNC_PIN ; set pin as output sbi DDRC, DEBUG_PIN ; set pin as output + sbi DDRC, BUSY_PIN ; set pin as output cbi DDRD, CLK_PIN ; set pin as input - ldi r16, 0xFF - out DDRA, r16 ; set port as output (contains video pin) - ldi r16, 0x00 - out DDRB, r16 ; set port as input (used as data bus) + ldi HIGH_ACCUM, 0xFF + out DDRA, HIGH_ACCUM ; set port as output (contains video pin) + ldi HIGH_ACCUM, 0x00 + out DDRB, HIGH_ACCUM ; set port as input (used as data bus) ; *** timer setup (use 16-bit counter TC1) *** ; The Power Reduction TC1 and TC3 bits in the Power Reduction Registers (PRR0.PRTIM1 and ; PRR1.PRTIM3) must be written to zero to enable the TC1 and TC3 module. - ldi r16, 0b00000000 - sts PRR0, r16 + ldi HIGH_ACCUM, 0b00000000 + sts PRR0, HIGH_ACCUM ; Set timer prescaler to 1:1 - LDI r16,0b00000001 - sts TCCR1B,r16 + LDI HIGH_ACCUM,0b00000001 + sts TCCR1B,HIGH_ACCUM ; Enambe timer1 overflow interrupt - LDI r16,0b00000001 - STS TIMSK1,r16 + LDI HIGH_ACCUM,0b00000001 + STS TIMSK1,HIGH_ACCUM ; Enable interrupts globally SEI ; Timer setup completed. @@ -82,3 +97,4 @@ main: .include "video_generator.asm" ; Asyncronous timer-interrupt-based video generation .include "character_generator.asm" ; Character generator .include "communication.asm" ; Communication with Pat80 +.include "font.asm" ; Font face diff --git a/pat80-io-devices/composite-pal-adapter/software/avr-assembly/video_generator.asm b/pat80-io-devices/composite-pal-adapter/software/avr-assembly/video_generator.asm index 48ea734..d1531ff 100644 --- a/pat80-io-devices/composite-pal-adapter/software/avr-assembly/video_generator.asm +++ b/pat80-io-devices/composite-pal-adapter/software/avr-assembly/video_generator.asm @@ -29,6 +29,9 @@ ; ********* FUNCTIONS CALLED BY INTERRUPT *********** on_tim1_ovf: + ; TODO: save BUSY pin status and restore it before RETI, because it could be in BUSY status when interrupted + ; set BUSY pin to indicate the mc is unresponsive from now on + sbi PORTD, BUSY_PIN ; called by timer 1 two times per line (every 32 uS) during hsync, unless drawing picture. inc STATUS ; if STATUS >= 33 then STATUS=0 @@ -45,34 +48,38 @@ on_tim1_ovf: ; reti is at end of all previous jumps draw_picture: + ; save X register + push XH + push XL + ; set X register to framebuffer start 0x0100 ; (set it a byte before, because it will be incremented at first) clr r27 ldi r26, 0xFF ; start 304 picture lines - ldi r17, 152 ; line counter + ldi LINE_COUNTER, 152 ; line counter h_picture_loop: ; ***************** DRAW FIRST LINE ********************* ; **** start line sync: 4uS, 96 cycles @ 24Mhz ; video pin goes low before sync - clr r19 ; 1 cycle - out PORTA, r19 ; 1 cycle + clr VG_HIGH_ACCUM ; 1 cycle + out VIDEO_PORT_OUT, VG_HIGH_ACCUM ; 1 cycle cbi PORTC, SYNC_PIN ; sync goes low (0v) ; 2 cycle - ldi r18, 31 ; 1 cycle + ldi VG_HIGH_ACCUM, 31 ; 1 cycle l_sync_pulse_loop: ; requires 3 cpu cycles - dec r18 ; 1 cycle + dec VG_HIGH_ACCUM ; 1 cycle brne l_sync_pulse_loop ; 2 cycle if true, 1 if false sbi PORTC, SYNC_PIN ; sync goes high (0.3v) ; **** end line sync ; **** start line back porch: 8uS, 192 cycles @ 24Mhz ; leave time at the end for line setup and draw_line call - ldi r18, 62 ; 1 cycle + ldi VG_HIGH_ACCUM, 62 ; 1 cycle l_sync_back_porch_loop: - dec r18 ; 1 cycle + dec VG_HIGH_ACCUM ; 1 cycle brne l_sync_back_porch_loop ; 2 cycle if true, 1 if false ; **** end back porch @@ -85,35 +92,39 @@ draw_picture: ; **** start line sync: 4uS, 96 cycles @ 24Mhz ; video pin goes low before sync - clr r19 ; 1 cycle - out PORTA, r19 ; 1 cycle + clr VG_HIGH_ACCUM ; 1 cycle + out VIDEO_PORT_OUT, VG_HIGH_ACCUM ; 1 cycle cbi PORTC, SYNC_PIN ; sync goes low (0v) ; 2 cycle - ldi r18, 31 ; 1 cycle + ldi VG_HIGH_ACCUM, 31 ; 1 cycle l_sync_pulse_loop2: ; requires 3 cpu cycles - dec r18 ; 1 cycle + dec VG_HIGH_ACCUM ; 1 cycle brne l_sync_pulse_loop2 ; 2 cycle if true, 1 if false sbi PORTC, SYNC_PIN ; sync goes high (0.3v) ; **** end line sync ; **** start line back porch: 8uS, 192 cycles @ 24Mhz ; leave time at the end for line setup and draw_line call - ldi r18, 62 ; 1 cycle + ldi VG_HIGH_ACCUM, 62 ; 1 cycle l_sync_back_porch_loop2: - dec r18 ; 1 cycle + dec VG_HIGH_ACCUM ; 1 cycle brne l_sync_back_porch_loop2 ; 2 cycle if true, 1 if false ; **** end back porch call draw_line ; 3 cycles (+ 3 to come back to on_line_drawn) ; **** draws line pixels: 52uS, 1248 cycles @ 24Mhz **** - dec r17 ; decrement line countr ; 1 cycle + dec LINE_COUNTER ; decrement line countr ; 1 cycle brne h_picture_loop ; if not 0, repeat h_picture_loop ; 2 cycle if true, 1 if false ; end picture lines + ; restore X register + pop XL + pop XH + ; video pin goes low before sync - clr r19 ; 1 cycle - out PORTA, r19 ; 1 cycle + clr VG_HIGH_ACCUM ; 1 cycle + out VIDEO_PORT_OUT, VG_HIGH_ACCUM ; 1 cycle ; immediately start first end-screen short sync: inc STATUS @@ -133,6 +144,8 @@ long_sync: ldi r26, low(TIMER_DELAY_30US) sts TCNT1H,r27 sts TCNT1L,r26 + ; clear BUSY pin to indicate the mc is again responsive from now on + cbi PORTD, BUSY_PIN reti long_sync_end: @@ -143,6 +156,8 @@ long_sync: ldi r26, low(TIMER_DELAY_2US) sts TCNT1H,r27 sts TCNT1L,r26 + ; clear BUSY pin to indicate the mc is again responsive from now on + cbi PORTD, BUSY_PIN reti @@ -158,6 +173,8 @@ short_sync: ldi r26, low(TIMER_DELAY_2US) sts TCNT1H,r27 sts TCNT1L,r26 + ; clear BUSY pin to indicate the mc is again responsive from now on + cbi PORTD, BUSY_PIN reti short_sync_end: @@ -168,6 +185,8 @@ short_sync: ldi r26, low(TIMER_DELAY_30US) sts TCNT1H,r27 sts TCNT1L,r26 + ; clear BUSY pin to indicate the mc is again responsive from now on + cbi PORTD, BUSY_PIN reti @@ -177,1302 +196,1302 @@ draw_line: ; chunk 1 ld A, X+ ; load pixel ; 2 cycles - out PORTA, A ; 1 cycle + out VIDEO_PORT_OUT, A ; 1 cycle nop ; 1 cycle lsr A ; 1 cycle - out PORTA, A ; 1 cycle + out VIDEO_PORT_OUT, A ; 1 cycle nop ; 1 cycle lsr A ; 1 cycle - out PORTA, A ; 1 cycle + out VIDEO_PORT_OUT, A ; 1 cycle nop ; 1 cycle lsr A ; 1 cycle - out PORTA, A ; 1 cycle + out VIDEO_PORT_OUT, A ; 1 cycle nop ; 1 cycle lsr A ; 1 cycle - out PORTA, A ; 1 cycle + out VIDEO_PORT_OUT, A ; 1 cycle nop ; 1 cycle lsr A ; 1 cycle - out PORTA, A ; 1 cycle + out VIDEO_PORT_OUT, A ; 1 cycle nop ; 1 cycle lsr A ; 1 cycle - out PORTA, A ; 1 cycle + out VIDEO_PORT_OUT, A ; 1 cycle nop ; 1 cycle lsr A ; 1 cycle - out PORTA, A ; 1 cycle + out VIDEO_PORT_OUT, A ; 1 cycle ; chunk 2 ld A, X+ ; load pixel ; 2 cycles - out PORTA, A ; 1 cycle + out VIDEO_PORT_OUT, A ; 1 cycle nop ; 1 cycle lsr A ; 1 cycle - out PORTA, A ; 1 cycle + out VIDEO_PORT_OUT, A ; 1 cycle nop ; 1 cycle lsr A ; 1 cycle - out PORTA, A ; 1 cycle + out VIDEO_PORT_OUT, A ; 1 cycle nop ; 1 cycle lsr A ; 1 cycle - out PORTA, A ; 1 cycle + out VIDEO_PORT_OUT, A ; 1 cycle nop ; 1 cycle lsr A ; 1 cycle - out PORTA, A ; 1 cycle + out VIDEO_PORT_OUT, A ; 1 cycle nop ; 1 cycle lsr A ; 1 cycle - out PORTA, A ; 1 cycle + out VIDEO_PORT_OUT, A ; 1 cycle nop ; 1 cycle lsr A ; 1 cycle - out PORTA, A ; 1 cycle + out VIDEO_PORT_OUT, A ; 1 cycle nop ; 1 cycle lsr A ; 1 cycle - out PORTA, A ; 1 cycle + out VIDEO_PORT_OUT, A ; 1 cycle ; chunk 3 ld A, X+ ; load pixel ; 2 cycles - out PORTA, A ; 1 cycle + out VIDEO_PORT_OUT, A ; 1 cycle nop ; 1 cycle lsr A ; 1 cycle - out PORTA, A ; 1 cycle + out VIDEO_PORT_OUT, A ; 1 cycle nop ; 1 cycle lsr A ; 1 cycle - out PORTA, A ; 1 cycle + out VIDEO_PORT_OUT, A ; 1 cycle nop ; 1 cycle lsr A ; 1 cycle - out PORTA, A ; 1 cycle + out VIDEO_PORT_OUT, A ; 1 cycle nop ; 1 cycle lsr A ; 1 cycle - out PORTA, A ; 1 cycle + out VIDEO_PORT_OUT, A ; 1 cycle nop ; 1 cycle lsr A ; 1 cycle - out PORTA, A ; 1 cycle + out VIDEO_PORT_OUT, A ; 1 cycle nop ; 1 cycle lsr A ; 1 cycle - out PORTA, A ; 1 cycle + out VIDEO_PORT_OUT, A ; 1 cycle nop ; 1 cycle lsr A ; 1 cycle - out PORTA, A ; 1 cycle + out VIDEO_PORT_OUT, A ; 1 cycle ; chunk 4 ld A, X+ ; load pixel ; 2 cycles - out PORTA, A ; 1 cycle + out VIDEO_PORT_OUT, A ; 1 cycle nop ; 1 cycle lsr A ; 1 cycle - out PORTA, A ; 1 cycle + out VIDEO_PORT_OUT, A ; 1 cycle nop ; 1 cycle lsr A ; 1 cycle - out PORTA, A ; 1 cycle + out VIDEO_PORT_OUT, A ; 1 cycle nop ; 1 cycle lsr A ; 1 cycle - out PORTA, A ; 1 cycle + out VIDEO_PORT_OUT, A ; 1 cycle nop ; 1 cycle lsr A ; 1 cycle - out PORTA, A ; 1 cycle + out VIDEO_PORT_OUT, A ; 1 cycle nop ; 1 cycle lsr A ; 1 cycle - out PORTA, A ; 1 cycle + out VIDEO_PORT_OUT, A ; 1 cycle nop ; 1 cycle lsr A ; 1 cycle - out PORTA, A ; 1 cycle + out VIDEO_PORT_OUT, A ; 1 cycle nop ; 1 cycle lsr A ; 1 cycle - out PORTA, A ; 1 cycle + out VIDEO_PORT_OUT, A ; 1 cycle ; chunk 5 ld A, X+ ; load pixel ; 2 cycles - out PORTA, A ; 1 cycle + out VIDEO_PORT_OUT, A ; 1 cycle nop ; 1 cycle lsr A ; 1 cycle - out PORTA, A ; 1 cycle + out VIDEO_PORT_OUT, A ; 1 cycle nop ; 1 cycle lsr A ; 1 cycle - out PORTA, A ; 1 cycle + out VIDEO_PORT_OUT, A ; 1 cycle nop ; 1 cycle lsr A ; 1 cycle - out PORTA, A ; 1 cycle + out VIDEO_PORT_OUT, A ; 1 cycle nop ; 1 cycle lsr A ; 1 cycle - out PORTA, A ; 1 cycle + out VIDEO_PORT_OUT, A ; 1 cycle nop ; 1 cycle lsr A ; 1 cycle - out PORTA, A ; 1 cycle + out VIDEO_PORT_OUT, A ; 1 cycle nop ; 1 cycle lsr A ; 1 cycle - out PORTA, A ; 1 cycle + out VIDEO_PORT_OUT, A ; 1 cycle nop ; 1 cycle lsr A ; 1 cycle - out PORTA, A ; 1 cycle + out VIDEO_PORT_OUT, A ; 1 cycle ; chunk 6 ld A, X+ ; load pixel ; 2 cycles - out PORTA, A ; 1 cycle + out VIDEO_PORT_OUT, A ; 1 cycle nop ; 1 cycle lsr A ; 1 cycle - out PORTA, A ; 1 cycle + out VIDEO_PORT_OUT, A ; 1 cycle nop ; 1 cycle lsr A ; 1 cycle - out PORTA, A ; 1 cycle + out VIDEO_PORT_OUT, A ; 1 cycle nop ; 1 cycle lsr A ; 1 cycle - out PORTA, A ; 1 cycle + out VIDEO_PORT_OUT, A ; 1 cycle nop ; 1 cycle lsr A ; 1 cycle - out PORTA, A ; 1 cycle + out VIDEO_PORT_OUT, A ; 1 cycle nop ; 1 cycle lsr A ; 1 cycle - out PORTA, A ; 1 cycle + out VIDEO_PORT_OUT, A ; 1 cycle nop ; 1 cycle lsr A ; 1 cycle - out PORTA, A ; 1 cycle + out VIDEO_PORT_OUT, A ; 1 cycle nop ; 1 cycle lsr A ; 1 cycle - out PORTA, A ; 1 cycle + out VIDEO_PORT_OUT, A ; 1 cycle ; chunk 7 ld A, X+ ; load pixel ; 2 cycles - out PORTA, A ; 1 cycle + out VIDEO_PORT_OUT, A ; 1 cycle nop ; 1 cycle lsr A ; 1 cycle - out PORTA, A ; 1 cycle + out VIDEO_PORT_OUT, A ; 1 cycle nop ; 1 cycle lsr A ; 1 cycle - out PORTA, A ; 1 cycle + out VIDEO_PORT_OUT, A ; 1 cycle nop ; 1 cycle lsr A ; 1 cycle - out PORTA, A ; 1 cycle + out VIDEO_PORT_OUT, A ; 1 cycle nop ; 1 cycle lsr A ; 1 cycle - out PORTA, A ; 1 cycle + out VIDEO_PORT_OUT, A ; 1 cycle nop ; 1 cycle lsr A ; 1 cycle - out PORTA, A ; 1 cycle + out VIDEO_PORT_OUT, A ; 1 cycle nop ; 1 cycle lsr A ; 1 cycle - out PORTA, A ; 1 cycle + out VIDEO_PORT_OUT, A ; 1 cycle nop ; 1 cycle lsr A ; 1 cycle - out PORTA, A ; 1 cycle + out VIDEO_PORT_OUT, A ; 1 cycle ; chunk 8 ld A, X+ ; load pixel ; 2 cycles - out PORTA, A ; 1 cycle + out VIDEO_PORT_OUT, A ; 1 cycle nop ; 1 cycle lsr A ; 1 cycle - out PORTA, A ; 1 cycle + out VIDEO_PORT_OUT, A ; 1 cycle nop ; 1 cycle lsr A ; 1 cycle - out PORTA, A ; 1 cycle + out VIDEO_PORT_OUT, A ; 1 cycle nop ; 1 cycle lsr A ; 1 cycle - out PORTA, A ; 1 cycle + out VIDEO_PORT_OUT, A ; 1 cycle nop ; 1 cycle lsr A ; 1 cycle - out PORTA, A ; 1 cycle + out VIDEO_PORT_OUT, A ; 1 cycle nop ; 1 cycle lsr A ; 1 cycle - out PORTA, A ; 1 cycle + out VIDEO_PORT_OUT, A ; 1 cycle nop ; 1 cycle lsr A ; 1 cycle - out PORTA, A ; 1 cycle + out VIDEO_PORT_OUT, A ; 1 cycle nop ; 1 cycle lsr A ; 1 cycle - out PORTA, A ; 1 cycle + out VIDEO_PORT_OUT, A ; 1 cycle ; chunk 9 ld A, X+ ; load pixel ; 2 cycles - out PORTA, A ; 1 cycle + out VIDEO_PORT_OUT, A ; 1 cycle nop ; 1 cycle lsr A ; 1 cycle - out PORTA, A ; 1 cycle + out VIDEO_PORT_OUT, A ; 1 cycle nop ; 1 cycle lsr A ; 1 cycle - out PORTA, A ; 1 cycle + out VIDEO_PORT_OUT, A ; 1 cycle nop ; 1 cycle lsr A ; 1 cycle - out PORTA, A ; 1 cycle + out VIDEO_PORT_OUT, A ; 1 cycle nop ; 1 cycle lsr A ; 1 cycle - out PORTA, A ; 1 cycle + out VIDEO_PORT_OUT, A ; 1 cycle nop ; 1 cycle lsr A ; 1 cycle - out PORTA, A ; 1 cycle + out VIDEO_PORT_OUT, A ; 1 cycle nop ; 1 cycle lsr A ; 1 cycle - out PORTA, A ; 1 cycle + out VIDEO_PORT_OUT, A ; 1 cycle nop ; 1 cycle lsr A ; 1 cycle - out PORTA, A ; 1 cycle + out VIDEO_PORT_OUT, A ; 1 cycle ; chunk 10 ld A, X+ ; load pixel ; 2 cycles - out PORTA, A ; 1 cycle + out VIDEO_PORT_OUT, A ; 1 cycle nop ; 1 cycle lsr A ; 1 cycle - out PORTA, A ; 1 cycle + out VIDEO_PORT_OUT, A ; 1 cycle nop ; 1 cycle lsr A ; 1 cycle - out PORTA, A ; 1 cycle + out VIDEO_PORT_OUT, A ; 1 cycle nop ; 1 cycle lsr A ; 1 cycle - out PORTA, A ; 1 cycle + out VIDEO_PORT_OUT, A ; 1 cycle nop ; 1 cycle lsr A ; 1 cycle - out PORTA, A ; 1 cycle + out VIDEO_PORT_OUT, A ; 1 cycle nop ; 1 cycle lsr A ; 1 cycle - out PORTA, A ; 1 cycle + out VIDEO_PORT_OUT, A ; 1 cycle nop ; 1 cycle lsr A ; 1 cycle - out PORTA, A ; 1 cycle + out VIDEO_PORT_OUT, A ; 1 cycle nop ; 1 cycle lsr A ; 1 cycle - out PORTA, A ; 1 cycle + out VIDEO_PORT_OUT, A ; 1 cycle ; chunk 11 ld A, X+ ; load pixel ; 2 cycles - out PORTA, A ; 1 cycle + out VIDEO_PORT_OUT, A ; 1 cycle nop ; 1 cycle lsr A ; 1 cycle - out PORTA, A ; 1 cycle + out VIDEO_PORT_OUT, A ; 1 cycle nop ; 1 cycle lsr A ; 1 cycle - out PORTA, A ; 1 cycle + out VIDEO_PORT_OUT, A ; 1 cycle nop ; 1 cycle lsr A ; 1 cycle - out PORTA, A ; 1 cycle + out VIDEO_PORT_OUT, A ; 1 cycle nop ; 1 cycle lsr A ; 1 cycle - out PORTA, A ; 1 cycle + out VIDEO_PORT_OUT, A ; 1 cycle nop ; 1 cycle lsr A ; 1 cycle - out PORTA, A ; 1 cycle + out VIDEO_PORT_OUT, A ; 1 cycle nop ; 1 cycle lsr A ; 1 cycle - out PORTA, A ; 1 cycle + out VIDEO_PORT_OUT, A ; 1 cycle nop ; 1 cycle lsr A ; 1 cycle - out PORTA, A ; 1 cycle + out VIDEO_PORT_OUT, A ; 1 cycle ; chunk 12 ld A, X+ ; load pixel ; 2 cycles - out PORTA, A ; 1 cycle + out VIDEO_PORT_OUT, A ; 1 cycle nop ; 1 cycle lsr A ; 1 cycle - out PORTA, A ; 1 cycle + out VIDEO_PORT_OUT, A ; 1 cycle nop ; 1 cycle lsr A ; 1 cycle - out PORTA, A ; 1 cycle + out VIDEO_PORT_OUT, A ; 1 cycle nop ; 1 cycle lsr A ; 1 cycle - out PORTA, A ; 1 cycle + out VIDEO_PORT_OUT, A ; 1 cycle nop ; 1 cycle lsr A ; 1 cycle - out PORTA, A ; 1 cycle + out VIDEO_PORT_OUT, A ; 1 cycle nop ; 1 cycle lsr A ; 1 cycle - out PORTA, A ; 1 cycle + out VIDEO_PORT_OUT, A ; 1 cycle nop ; 1 cycle lsr A ; 1 cycle - out PORTA, A ; 1 cycle + out VIDEO_PORT_OUT, A ; 1 cycle nop ; 1 cycle lsr A ; 1 cycle - out PORTA, A ; 1 cycle + out VIDEO_PORT_OUT, A ; 1 cycle ; chunk 13 ld A, X+ ; load pixel ; 2 cycles - out PORTA, A ; 1 cycle + out VIDEO_PORT_OUT, A ; 1 cycle nop ; 1 cycle lsr A ; 1 cycle - out PORTA, A ; 1 cycle + out VIDEO_PORT_OUT, A ; 1 cycle nop ; 1 cycle lsr A ; 1 cycle - out PORTA, A ; 1 cycle + out VIDEO_PORT_OUT, A ; 1 cycle nop ; 1 cycle lsr A ; 1 cycle - out PORTA, A ; 1 cycle + out VIDEO_PORT_OUT, A ; 1 cycle nop ; 1 cycle lsr A ; 1 cycle - out PORTA, A ; 1 cycle + out VIDEO_PORT_OUT, A ; 1 cycle nop ; 1 cycle lsr A ; 1 cycle - out PORTA, A ; 1 cycle + out VIDEO_PORT_OUT, A ; 1 cycle nop ; 1 cycle lsr A ; 1 cycle - out PORTA, A ; 1 cycle + out VIDEO_PORT_OUT, A ; 1 cycle nop ; 1 cycle lsr A ; 1 cycle - out PORTA, A ; 1 cycle + out VIDEO_PORT_OUT, A ; 1 cycle ; chunk 14 ld A, X+ ; load pixel ; 2 cycles - out PORTA, A ; 1 cycle + out VIDEO_PORT_OUT, A ; 1 cycle nop ; 1 cycle lsr A ; 1 cycle - out PORTA, A ; 1 cycle + out VIDEO_PORT_OUT, A ; 1 cycle nop ; 1 cycle lsr A ; 1 cycle - out PORTA, A ; 1 cycle + out VIDEO_PORT_OUT, A ; 1 cycle nop ; 1 cycle lsr A ; 1 cycle - out PORTA, A ; 1 cycle + out VIDEO_PORT_OUT, A ; 1 cycle nop ; 1 cycle lsr A ; 1 cycle - out PORTA, A ; 1 cycle + out VIDEO_PORT_OUT, A ; 1 cycle nop ; 1 cycle lsr A ; 1 cycle - out PORTA, A ; 1 cycle + out VIDEO_PORT_OUT, A ; 1 cycle nop ; 1 cycle lsr A ; 1 cycle - out PORTA, A ; 1 cycle + out VIDEO_PORT_OUT, A ; 1 cycle nop ; 1 cycle lsr A ; 1 cycle - out PORTA, A ; 1 cycle + out VIDEO_PORT_OUT, A ; 1 cycle ; chunk 15 ld A, X+ ; load pixel ; 2 cycles - out PORTA, A ; 1 cycle + out VIDEO_PORT_OUT, A ; 1 cycle nop ; 1 cycle lsr A ; 1 cycle - out PORTA, A ; 1 cycle + out VIDEO_PORT_OUT, A ; 1 cycle nop ; 1 cycle lsr A ; 1 cycle - out PORTA, A ; 1 cycle + out VIDEO_PORT_OUT, A ; 1 cycle nop ; 1 cycle lsr A ; 1 cycle - out PORTA, A ; 1 cycle + out VIDEO_PORT_OUT, A ; 1 cycle nop ; 1 cycle lsr A ; 1 cycle - out PORTA, A ; 1 cycle + out VIDEO_PORT_OUT, A ; 1 cycle nop ; 1 cycle lsr A ; 1 cycle - out PORTA, A ; 1 cycle + out VIDEO_PORT_OUT, A ; 1 cycle nop ; 1 cycle lsr A ; 1 cycle - out PORTA, A ; 1 cycle + out VIDEO_PORT_OUT, A ; 1 cycle nop ; 1 cycle lsr A ; 1 cycle - out PORTA, A ; 1 cycle + out VIDEO_PORT_OUT, A ; 1 cycle ; chunk 16 ld A, X+ ; load pixel ; 2 cycles - out PORTA, A ; 1 cycle + out VIDEO_PORT_OUT, A ; 1 cycle nop ; 1 cycle lsr A ; 1 cycle - out PORTA, A ; 1 cycle + out VIDEO_PORT_OUT, A ; 1 cycle nop ; 1 cycle lsr A ; 1 cycle - out PORTA, A ; 1 cycle + out VIDEO_PORT_OUT, A ; 1 cycle nop ; 1 cycle lsr A ; 1 cycle - out PORTA, A ; 1 cycle + out VIDEO_PORT_OUT, A ; 1 cycle nop ; 1 cycle lsr A ; 1 cycle - out PORTA, A ; 1 cycle + out VIDEO_PORT_OUT, A ; 1 cycle nop ; 1 cycle lsr A ; 1 cycle - out PORTA, A ; 1 cycle + out VIDEO_PORT_OUT, A ; 1 cycle nop ; 1 cycle lsr A ; 1 cycle - out PORTA, A ; 1 cycle + out VIDEO_PORT_OUT, A ; 1 cycle nop ; 1 cycle lsr A ; 1 cycle - out PORTA, A ; 1 cycle + out VIDEO_PORT_OUT, A ; 1 cycle ; chunk 17 ld A, X+ ; load pixel ; 2 cycles - out PORTA, A ; 1 cycle + out VIDEO_PORT_OUT, A ; 1 cycle nop ; 1 cycle lsr A ; 1 cycle - out PORTA, A ; 1 cycle + out VIDEO_PORT_OUT, A ; 1 cycle nop ; 1 cycle lsr A ; 1 cycle - out PORTA, A ; 1 cycle + out VIDEO_PORT_OUT, A ; 1 cycle nop ; 1 cycle lsr A ; 1 cycle - out PORTA, A ; 1 cycle + out VIDEO_PORT_OUT, A ; 1 cycle nop ; 1 cycle lsr A ; 1 cycle - out PORTA, A ; 1 cycle + out VIDEO_PORT_OUT, A ; 1 cycle nop ; 1 cycle lsr A ; 1 cycle - out PORTA, A ; 1 cycle + out VIDEO_PORT_OUT, A ; 1 cycle nop ; 1 cycle lsr A ; 1 cycle - out PORTA, A ; 1 cycle + out VIDEO_PORT_OUT, A ; 1 cycle nop ; 1 cycle lsr A ; 1 cycle - out PORTA, A ; 1 cycle + out VIDEO_PORT_OUT, A ; 1 cycle ; chunk 18 ld A, X+ ; load pixel ; 2 cycles - out PORTA, A ; 1 cycle + out VIDEO_PORT_OUT, A ; 1 cycle nop ; 1 cycle lsr A ; 1 cycle - out PORTA, A ; 1 cycle + out VIDEO_PORT_OUT, A ; 1 cycle nop ; 1 cycle lsr A ; 1 cycle - out PORTA, A ; 1 cycle + out VIDEO_PORT_OUT, A ; 1 cycle nop ; 1 cycle lsr A ; 1 cycle - out PORTA, A ; 1 cycle + out VIDEO_PORT_OUT, A ; 1 cycle nop ; 1 cycle lsr A ; 1 cycle - out PORTA, A ; 1 cycle + out VIDEO_PORT_OUT, A ; 1 cycle nop ; 1 cycle lsr A ; 1 cycle - out PORTA, A ; 1 cycle + out VIDEO_PORT_OUT, A ; 1 cycle nop ; 1 cycle lsr A ; 1 cycle - out PORTA, A ; 1 cycle + out VIDEO_PORT_OUT, A ; 1 cycle nop ; 1 cycle lsr A ; 1 cycle - out PORTA, A ; 1 cycle + out VIDEO_PORT_OUT, A ; 1 cycle ; chunk 19 ld A, X+ ; load pixel ; 2 cycles - out PORTA, A ; 1 cycle + out VIDEO_PORT_OUT, A ; 1 cycle nop ; 1 cycle lsr A ; 1 cycle - out PORTA, A ; 1 cycle + out VIDEO_PORT_OUT, A ; 1 cycle nop ; 1 cycle lsr A ; 1 cycle - out PORTA, A ; 1 cycle + out VIDEO_PORT_OUT, A ; 1 cycle nop ; 1 cycle lsr A ; 1 cycle - out PORTA, A ; 1 cycle + out VIDEO_PORT_OUT, A ; 1 cycle nop ; 1 cycle lsr A ; 1 cycle - out PORTA, A ; 1 cycle + out VIDEO_PORT_OUT, A ; 1 cycle nop ; 1 cycle lsr A ; 1 cycle - out PORTA, A ; 1 cycle + out VIDEO_PORT_OUT, A ; 1 cycle nop ; 1 cycle lsr A ; 1 cycle - out PORTA, A ; 1 cycle + out VIDEO_PORT_OUT, A ; 1 cycle nop ; 1 cycle lsr A ; 1 cycle - out PORTA, A ; 1 cycle + out VIDEO_PORT_OUT, A ; 1 cycle ; chunk 20 ld A, X+ ; load pixel ; 2 cycles - out PORTA, A ; 1 cycle + out VIDEO_PORT_OUT, A ; 1 cycle nop ; 1 cycle lsr A ; 1 cycle - out PORTA, A ; 1 cycle + out VIDEO_PORT_OUT, A ; 1 cycle nop ; 1 cycle lsr A ; 1 cycle - out PORTA, A ; 1 cycle + out VIDEO_PORT_OUT, A ; 1 cycle nop ; 1 cycle lsr A ; 1 cycle - out PORTA, A ; 1 cycle + out VIDEO_PORT_OUT, A ; 1 cycle nop ; 1 cycle lsr A ; 1 cycle - out PORTA, A ; 1 cycle + out VIDEO_PORT_OUT, A ; 1 cycle nop ; 1 cycle lsr A ; 1 cycle - out PORTA, A ; 1 cycle + out VIDEO_PORT_OUT, A ; 1 cycle nop ; 1 cycle lsr A ; 1 cycle - out PORTA, A ; 1 cycle + out VIDEO_PORT_OUT, A ; 1 cycle nop ; 1 cycle lsr A ; 1 cycle - out PORTA, A ; 1 cycle + out VIDEO_PORT_OUT, A ; 1 cycle ; chunk 21 ld A, X+ ; load pixel ; 2 cycles - out PORTA, A ; 1 cycle + out VIDEO_PORT_OUT, A ; 1 cycle nop ; 1 cycle lsr A ; 1 cycle - out PORTA, A ; 1 cycle + out VIDEO_PORT_OUT, A ; 1 cycle nop ; 1 cycle lsr A ; 1 cycle - out PORTA, A ; 1 cycle + out VIDEO_PORT_OUT, A ; 1 cycle nop ; 1 cycle lsr A ; 1 cycle - out PORTA, A ; 1 cycle + out VIDEO_PORT_OUT, A ; 1 cycle nop ; 1 cycle lsr A ; 1 cycle - out PORTA, A ; 1 cycle + out VIDEO_PORT_OUT, A ; 1 cycle nop ; 1 cycle lsr A ; 1 cycle - out PORTA, A ; 1 cycle + out VIDEO_PORT_OUT, A ; 1 cycle nop ; 1 cycle lsr A ; 1 cycle - out PORTA, A ; 1 cycle + out VIDEO_PORT_OUT, A ; 1 cycle nop ; 1 cycle lsr A ; 1 cycle - out PORTA, A ; 1 cycle + out VIDEO_PORT_OUT, A ; 1 cycle ; chunk 22 ld A, X+ ; load pixel ; 2 cycles - out PORTA, A ; 1 cycle + out VIDEO_PORT_OUT, A ; 1 cycle nop ; 1 cycle lsr A ; 1 cycle - out PORTA, A ; 1 cycle + out VIDEO_PORT_OUT, A ; 1 cycle nop ; 1 cycle lsr A ; 1 cycle - out PORTA, A ; 1 cycle + out VIDEO_PORT_OUT, A ; 1 cycle nop ; 1 cycle lsr A ; 1 cycle - out PORTA, A ; 1 cycle + out VIDEO_PORT_OUT, A ; 1 cycle nop ; 1 cycle lsr A ; 1 cycle - out PORTA, A ; 1 cycle + out VIDEO_PORT_OUT, A ; 1 cycle nop ; 1 cycle lsr A ; 1 cycle - out PORTA, A ; 1 cycle + out VIDEO_PORT_OUT, A ; 1 cycle nop ; 1 cycle lsr A ; 1 cycle - out PORTA, A ; 1 cycle + out VIDEO_PORT_OUT, A ; 1 cycle nop ; 1 cycle lsr A ; 1 cycle - out PORTA, A ; 1 cycle + out VIDEO_PORT_OUT, A ; 1 cycle ; chunk 23 ld A, X+ ; load pixel ; 2 cycles - out PORTA, A ; 1 cycle + out VIDEO_PORT_OUT, A ; 1 cycle nop ; 1 cycle lsr A ; 1 cycle - out PORTA, A ; 1 cycle + out VIDEO_PORT_OUT, A ; 1 cycle nop ; 1 cycle lsr A ; 1 cycle - out PORTA, A ; 1 cycle + out VIDEO_PORT_OUT, A ; 1 cycle nop ; 1 cycle lsr A ; 1 cycle - out PORTA, A ; 1 cycle + out VIDEO_PORT_OUT, A ; 1 cycle nop ; 1 cycle lsr A ; 1 cycle - out PORTA, A ; 1 cycle + out VIDEO_PORT_OUT, A ; 1 cycle nop ; 1 cycle lsr A ; 1 cycle - out PORTA, A ; 1 cycle + out VIDEO_PORT_OUT, A ; 1 cycle nop ; 1 cycle lsr A ; 1 cycle - out PORTA, A ; 1 cycle + out VIDEO_PORT_OUT, A ; 1 cycle nop ; 1 cycle lsr A ; 1 cycle - out PORTA, A ; 1 cycle + out VIDEO_PORT_OUT, A ; 1 cycle ; chunk 24 ld A, X+ ; load pixel ; 2 cycles - out PORTA, A ; 1 cycle + out VIDEO_PORT_OUT, A ; 1 cycle nop ; 1 cycle lsr A ; 1 cycle - out PORTA, A ; 1 cycle + out VIDEO_PORT_OUT, A ; 1 cycle nop ; 1 cycle lsr A ; 1 cycle - out PORTA, A ; 1 cycle + out VIDEO_PORT_OUT, A ; 1 cycle nop ; 1 cycle lsr A ; 1 cycle - out PORTA, A ; 1 cycle + out VIDEO_PORT_OUT, A ; 1 cycle nop ; 1 cycle lsr A ; 1 cycle - out PORTA, A ; 1 cycle + out VIDEO_PORT_OUT, A ; 1 cycle nop ; 1 cycle lsr A ; 1 cycle - out PORTA, A ; 1 cycle + out VIDEO_PORT_OUT, A ; 1 cycle nop ; 1 cycle lsr A ; 1 cycle - out PORTA, A ; 1 cycle + out VIDEO_PORT_OUT, A ; 1 cycle nop ; 1 cycle lsr A ; 1 cycle - out PORTA, A ; 1 cycle + out VIDEO_PORT_OUT, A ; 1 cycle ; chunk 25 ld A, X+ ; load pixel ; 2 cycles - out PORTA, A ; 1 cycle + out VIDEO_PORT_OUT, A ; 1 cycle nop ; 1 cycle lsr A ; 1 cycle - out PORTA, A ; 1 cycle + out VIDEO_PORT_OUT, A ; 1 cycle nop ; 1 cycle lsr A ; 1 cycle - out PORTA, A ; 1 cycle + out VIDEO_PORT_OUT, A ; 1 cycle nop ; 1 cycle lsr A ; 1 cycle - out PORTA, A ; 1 cycle + out VIDEO_PORT_OUT, A ; 1 cycle nop ; 1 cycle lsr A ; 1 cycle - out PORTA, A ; 1 cycle + out VIDEO_PORT_OUT, A ; 1 cycle nop ; 1 cycle lsr A ; 1 cycle - out PORTA, A ; 1 cycle + out VIDEO_PORT_OUT, A ; 1 cycle nop ; 1 cycle lsr A ; 1 cycle - out PORTA, A ; 1 cycle + out VIDEO_PORT_OUT, A ; 1 cycle nop ; 1 cycle lsr A ; 1 cycle - out PORTA, A ; 1 cycle + out VIDEO_PORT_OUT, A ; 1 cycle ; chunk 26 ld A, X+ ; load pixel ; 2 cycles - out PORTA, A ; 1 cycle + out VIDEO_PORT_OUT, A ; 1 cycle nop ; 1 cycle lsr A ; 1 cycle - out PORTA, A ; 1 cycle + out VIDEO_PORT_OUT, A ; 1 cycle nop ; 1 cycle lsr A ; 1 cycle - out PORTA, A ; 1 cycle + out VIDEO_PORT_OUT, A ; 1 cycle nop ; 1 cycle lsr A ; 1 cycle - out PORTA, A ; 1 cycle + out VIDEO_PORT_OUT, A ; 1 cycle nop ; 1 cycle lsr A ; 1 cycle - out PORTA, A ; 1 cycle + out VIDEO_PORT_OUT, A ; 1 cycle nop ; 1 cycle lsr A ; 1 cycle - out PORTA, A ; 1 cycle + out VIDEO_PORT_OUT, A ; 1 cycle nop ; 1 cycle lsr A ; 1 cycle - out PORTA, A ; 1 cycle + out VIDEO_PORT_OUT, A ; 1 cycle nop ; 1 cycle lsr A ; 1 cycle - out PORTA, A ; 1 cycle + out VIDEO_PORT_OUT, A ; 1 cycle ; chunk 27 ld A, X+ ; load pixel ; 2 cycles - out PORTA, A ; 1 cycle + out VIDEO_PORT_OUT, A ; 1 cycle nop ; 1 cycle lsr A ; 1 cycle - out PORTA, A ; 1 cycle + out VIDEO_PORT_OUT, A ; 1 cycle nop ; 1 cycle lsr A ; 1 cycle - out PORTA, A ; 1 cycle + out VIDEO_PORT_OUT, A ; 1 cycle nop ; 1 cycle lsr A ; 1 cycle - out PORTA, A ; 1 cycle + out VIDEO_PORT_OUT, A ; 1 cycle nop ; 1 cycle lsr A ; 1 cycle - out PORTA, A ; 1 cycle + out VIDEO_PORT_OUT, A ; 1 cycle nop ; 1 cycle lsr A ; 1 cycle - out PORTA, A ; 1 cycle + out VIDEO_PORT_OUT, A ; 1 cycle nop ; 1 cycle lsr A ; 1 cycle - out PORTA, A ; 1 cycle + out VIDEO_PORT_OUT, A ; 1 cycle nop ; 1 cycle lsr A ; 1 cycle - out PORTA, A ; 1 cycle + out VIDEO_PORT_OUT, A ; 1 cycle ; chunk 28 ld A, X+ ; load pixel ; 2 cycles - out PORTA, A ; 1 cycle + out VIDEO_PORT_OUT, A ; 1 cycle nop ; 1 cycle lsr A ; 1 cycle - out PORTA, A ; 1 cycle + out VIDEO_PORT_OUT, A ; 1 cycle nop ; 1 cycle lsr A ; 1 cycle - out PORTA, A ; 1 cycle + out VIDEO_PORT_OUT, A ; 1 cycle nop ; 1 cycle lsr A ; 1 cycle - out PORTA, A ; 1 cycle + out VIDEO_PORT_OUT, A ; 1 cycle nop ; 1 cycle lsr A ; 1 cycle - out PORTA, A ; 1 cycle + out VIDEO_PORT_OUT, A ; 1 cycle nop ; 1 cycle lsr A ; 1 cycle - out PORTA, A ; 1 cycle + out VIDEO_PORT_OUT, A ; 1 cycle nop ; 1 cycle lsr A ; 1 cycle - out PORTA, A ; 1 cycle + out VIDEO_PORT_OUT, A ; 1 cycle nop ; 1 cycle lsr A ; 1 cycle - out PORTA, A ; 1 cycle + out VIDEO_PORT_OUT, A ; 1 cycle ; chunk 29 ld A, X+ ; load pixel ; 2 cycles - out PORTA, A ; 1 cycle + out VIDEO_PORT_OUT, A ; 1 cycle nop ; 1 cycle lsr A ; 1 cycle - out PORTA, A ; 1 cycle + out VIDEO_PORT_OUT, A ; 1 cycle nop ; 1 cycle lsr A ; 1 cycle - out PORTA, A ; 1 cycle + out VIDEO_PORT_OUT, A ; 1 cycle nop ; 1 cycle lsr A ; 1 cycle - out PORTA, A ; 1 cycle + out VIDEO_PORT_OUT, A ; 1 cycle nop ; 1 cycle lsr A ; 1 cycle - out PORTA, A ; 1 cycle + out VIDEO_PORT_OUT, A ; 1 cycle nop ; 1 cycle lsr A ; 1 cycle - out PORTA, A ; 1 cycle + out VIDEO_PORT_OUT, A ; 1 cycle nop ; 1 cycle lsr A ; 1 cycle - out PORTA, A ; 1 cycle + out VIDEO_PORT_OUT, A ; 1 cycle nop ; 1 cycle lsr A ; 1 cycle - out PORTA, A ; 1 cycle + out VIDEO_PORT_OUT, A ; 1 cycle ; chunk 30 ld A, X+ ; load pixel ; 2 cycles - out PORTA, A ; 1 cycle + out VIDEO_PORT_OUT, A ; 1 cycle nop ; 1 cycle lsr A ; 1 cycle - out PORTA, A ; 1 cycle + out VIDEO_PORT_OUT, A ; 1 cycle nop ; 1 cycle lsr A ; 1 cycle - out PORTA, A ; 1 cycle + out VIDEO_PORT_OUT, A ; 1 cycle nop ; 1 cycle lsr A ; 1 cycle - out PORTA, A ; 1 cycle + out VIDEO_PORT_OUT, A ; 1 cycle nop ; 1 cycle lsr A ; 1 cycle - out PORTA, A ; 1 cycle + out VIDEO_PORT_OUT, A ; 1 cycle nop ; 1 cycle lsr A ; 1 cycle - out PORTA, A ; 1 cycle + out VIDEO_PORT_OUT, A ; 1 cycle nop ; 1 cycle lsr A ; 1 cycle - out PORTA, A ; 1 cycle + out VIDEO_PORT_OUT, A ; 1 cycle nop ; 1 cycle lsr A ; 1 cycle - out PORTA, A ; 1 cycle + out VIDEO_PORT_OUT, A ; 1 cycle ; chunk 31 ld A, X+ ; load pixel ; 2 cycles - out PORTA, A ; 1 cycle + out VIDEO_PORT_OUT, A ; 1 cycle nop ; 1 cycle lsr A ; 1 cycle - out PORTA, A ; 1 cycle + out VIDEO_PORT_OUT, A ; 1 cycle nop ; 1 cycle lsr A ; 1 cycle - out PORTA, A ; 1 cycle + out VIDEO_PORT_OUT, A ; 1 cycle nop ; 1 cycle lsr A ; 1 cycle - out PORTA, A ; 1 cycle + out VIDEO_PORT_OUT, A ; 1 cycle nop ; 1 cycle lsr A ; 1 cycle - out PORTA, A ; 1 cycle + out VIDEO_PORT_OUT, A ; 1 cycle nop ; 1 cycle lsr A ; 1 cycle - out PORTA, A ; 1 cycle + out VIDEO_PORT_OUT, A ; 1 cycle nop ; 1 cycle lsr A ; 1 cycle - out PORTA, A ; 1 cycle + out VIDEO_PORT_OUT, A ; 1 cycle nop ; 1 cycle lsr A ; 1 cycle - out PORTA, A ; 1 cycle + out VIDEO_PORT_OUT, A ; 1 cycle ; chunk 32 ld A, X+ ; load pixel ; 2 cycles - out PORTA, A ; 1 cycle + out VIDEO_PORT_OUT, A ; 1 cycle nop ; 1 cycle lsr A ; 1 cycle - out PORTA, A ; 1 cycle + out VIDEO_PORT_OUT, A ; 1 cycle nop ; 1 cycle lsr A ; 1 cycle - out PORTA, A ; 1 cycle + out VIDEO_PORT_OUT, A ; 1 cycle nop ; 1 cycle lsr A ; 1 cycle - out PORTA, A ; 1 cycle + out VIDEO_PORT_OUT, A ; 1 cycle nop ; 1 cycle lsr A ; 1 cycle - out PORTA, A ; 1 cycle + out VIDEO_PORT_OUT, A ; 1 cycle nop ; 1 cycle lsr A ; 1 cycle - out PORTA, A ; 1 cycle + out VIDEO_PORT_OUT, A ; 1 cycle nop ; 1 cycle lsr A ; 1 cycle - out PORTA, A ; 1 cycle + out VIDEO_PORT_OUT, A ; 1 cycle nop ; 1 cycle lsr A ; 1 cycle - out PORTA, A ; 1 cycle + out VIDEO_PORT_OUT, A ; 1 cycle ; chunk 33 ld A, X+ ; load pixel ; 2 cycles - out PORTA, A ; 1 cycle + out VIDEO_PORT_OUT, A ; 1 cycle nop ; 1 cycle lsr A ; 1 cycle - out PORTA, A ; 1 cycle + out VIDEO_PORT_OUT, A ; 1 cycle nop ; 1 cycle lsr A ; 1 cycle - out PORTA, A ; 1 cycle + out VIDEO_PORT_OUT, A ; 1 cycle nop ; 1 cycle lsr A ; 1 cycle - out PORTA, A ; 1 cycle + out VIDEO_PORT_OUT, A ; 1 cycle nop ; 1 cycle lsr A ; 1 cycle - out PORTA, A ; 1 cycle + out VIDEO_PORT_OUT, A ; 1 cycle nop ; 1 cycle lsr A ; 1 cycle - out PORTA, A ; 1 cycle + out VIDEO_PORT_OUT, A ; 1 cycle nop ; 1 cycle lsr A ; 1 cycle - out PORTA, A ; 1 cycle + out VIDEO_PORT_OUT, A ; 1 cycle nop ; 1 cycle lsr A ; 1 cycle - out PORTA, A ; 1 cycle + out VIDEO_PORT_OUT, A ; 1 cycle ; chunk 34 ld A, X+ ; load pixel ; 2 cycles - out PORTA, A ; 1 cycle + out VIDEO_PORT_OUT, A ; 1 cycle nop ; 1 cycle lsr A ; 1 cycle - out PORTA, A ; 1 cycle + out VIDEO_PORT_OUT, A ; 1 cycle nop ; 1 cycle lsr A ; 1 cycle - out PORTA, A ; 1 cycle + out VIDEO_PORT_OUT, A ; 1 cycle nop ; 1 cycle lsr A ; 1 cycle - out PORTA, A ; 1 cycle + out VIDEO_PORT_OUT, A ; 1 cycle nop ; 1 cycle lsr A ; 1 cycle - out PORTA, A ; 1 cycle + out VIDEO_PORT_OUT, A ; 1 cycle nop ; 1 cycle lsr A ; 1 cycle - out PORTA, A ; 1 cycle + out VIDEO_PORT_OUT, A ; 1 cycle nop ; 1 cycle lsr A ; 1 cycle - out PORTA, A ; 1 cycle + out VIDEO_PORT_OUT, A ; 1 cycle nop ; 1 cycle lsr A ; 1 cycle - out PORTA, A ; 1 cycle + out VIDEO_PORT_OUT, A ; 1 cycle ; chunk 35 ld A, X+ ; load pixel ; 2 cycles - out PORTA, A ; 1 cycle + out VIDEO_PORT_OUT, A ; 1 cycle nop ; 1 cycle lsr A ; 1 cycle - out PORTA, A ; 1 cycle + out VIDEO_PORT_OUT, A ; 1 cycle nop ; 1 cycle lsr A ; 1 cycle - out PORTA, A ; 1 cycle + out VIDEO_PORT_OUT, A ; 1 cycle nop ; 1 cycle lsr A ; 1 cycle - out PORTA, A ; 1 cycle + out VIDEO_PORT_OUT, A ; 1 cycle nop ; 1 cycle lsr A ; 1 cycle - out PORTA, A ; 1 cycle + out VIDEO_PORT_OUT, A ; 1 cycle nop ; 1 cycle lsr A ; 1 cycle - out PORTA, A ; 1 cycle + out VIDEO_PORT_OUT, A ; 1 cycle nop ; 1 cycle lsr A ; 1 cycle - out PORTA, A ; 1 cycle + out VIDEO_PORT_OUT, A ; 1 cycle nop ; 1 cycle lsr A ; 1 cycle - out PORTA, A ; 1 cycle + out VIDEO_PORT_OUT, A ; 1 cycle ; chunk 36 ld A, X+ ; load pixel ; 2 cycles - out PORTA, A ; 1 cycle + out VIDEO_PORT_OUT, A ; 1 cycle nop ; 1 cycle lsr A ; 1 cycle - out PORTA, A ; 1 cycle + out VIDEO_PORT_OUT, A ; 1 cycle nop ; 1 cycle lsr A ; 1 cycle - out PORTA, A ; 1 cycle + out VIDEO_PORT_OUT, A ; 1 cycle nop ; 1 cycle lsr A ; 1 cycle - out PORTA, A ; 1 cycle + out VIDEO_PORT_OUT, A ; 1 cycle nop ; 1 cycle lsr A ; 1 cycle - out PORTA, A ; 1 cycle + out VIDEO_PORT_OUT, A ; 1 cycle nop ; 1 cycle lsr A ; 1 cycle - out PORTA, A ; 1 cycle + out VIDEO_PORT_OUT, A ; 1 cycle nop ; 1 cycle lsr A ; 1 cycle - out PORTA, A ; 1 cycle + out VIDEO_PORT_OUT, A ; 1 cycle nop ; 1 cycle lsr A ; 1 cycle - out PORTA, A ; 1 cycle + out VIDEO_PORT_OUT, A ; 1 cycle ; chunk 37 ld A, X+ ; load pixel ; 2 cycles - out PORTA, A ; 1 cycle + out VIDEO_PORT_OUT, A ; 1 cycle nop ; 1 cycle lsr A ; 1 cycle - out PORTA, A ; 1 cycle + out VIDEO_PORT_OUT, A ; 1 cycle nop ; 1 cycle lsr A ; 1 cycle - out PORTA, A ; 1 cycle + out VIDEO_PORT_OUT, A ; 1 cycle nop ; 1 cycle lsr A ; 1 cycle - out PORTA, A ; 1 cycle + out VIDEO_PORT_OUT, A ; 1 cycle nop ; 1 cycle lsr A ; 1 cycle - out PORTA, A ; 1 cycle + out VIDEO_PORT_OUT, A ; 1 cycle nop ; 1 cycle lsr A ; 1 cycle - out PORTA, A ; 1 cycle + out VIDEO_PORT_OUT, A ; 1 cycle nop ; 1 cycle lsr A ; 1 cycle - out PORTA, A ; 1 cycle + out VIDEO_PORT_OUT, A ; 1 cycle nop ; 1 cycle lsr A ; 1 cycle - out PORTA, A ; 1 cycle + out VIDEO_PORT_OUT, A ; 1 cycle ; chunk 38 ld A, X+ ; load pixel ; 2 cycles - out PORTA, A ; 1 cycle + out VIDEO_PORT_OUT, A ; 1 cycle nop ; 1 cycle lsr A ; 1 cycle - out PORTA, A ; 1 cycle + out VIDEO_PORT_OUT, A ; 1 cycle nop ; 1 cycle lsr A ; 1 cycle - out PORTA, A ; 1 cycle + out VIDEO_PORT_OUT, A ; 1 cycle nop ; 1 cycle lsr A ; 1 cycle - out PORTA, A ; 1 cycle + out VIDEO_PORT_OUT, A ; 1 cycle nop ; 1 cycle lsr A ; 1 cycle - out PORTA, A ; 1 cycle + out VIDEO_PORT_OUT, A ; 1 cycle nop ; 1 cycle lsr A ; 1 cycle - out PORTA, A ; 1 cycle + out VIDEO_PORT_OUT, A ; 1 cycle nop ; 1 cycle lsr A ; 1 cycle - out PORTA, A ; 1 cycle + out VIDEO_PORT_OUT, A ; 1 cycle nop ; 1 cycle lsr A ; 1 cycle - out PORTA, A ; 1 cycle + out VIDEO_PORT_OUT, A ; 1 cycle ; chunk 39 ld A, X+ ; load pixel ; 2 cycles - out PORTA, A ; 1 cycle + out VIDEO_PORT_OUT, A ; 1 cycle nop ; 1 cycle lsr A ; 1 cycle - out PORTA, A ; 1 cycle + out VIDEO_PORT_OUT, A ; 1 cycle nop ; 1 cycle lsr A ; 1 cycle - out PORTA, A ; 1 cycle + out VIDEO_PORT_OUT, A ; 1 cycle nop ; 1 cycle lsr A ; 1 cycle - out PORTA, A ; 1 cycle + out VIDEO_PORT_OUT, A ; 1 cycle nop ; 1 cycle lsr A ; 1 cycle - out PORTA, A ; 1 cycle + out VIDEO_PORT_OUT, A ; 1 cycle nop ; 1 cycle lsr A ; 1 cycle - out PORTA, A ; 1 cycle + out VIDEO_PORT_OUT, A ; 1 cycle nop ; 1 cycle lsr A ; 1 cycle - out PORTA, A ; 1 cycle + out VIDEO_PORT_OUT, A ; 1 cycle nop ; 1 cycle lsr A ; 1 cycle - out PORTA, A ; 1 cycle + out VIDEO_PORT_OUT, A ; 1 cycle ; chunk 40 ld A, X+ ; load pixel ; 2 cycles - out PORTA, A ; 1 cycle + out VIDEO_PORT_OUT, A ; 1 cycle nop ; 1 cycle lsr A ; 1 cycle - out PORTA, A ; 1 cycle + out VIDEO_PORT_OUT, A ; 1 cycle nop ; 1 cycle lsr A ; 1 cycle - out PORTA, A ; 1 cycle + out VIDEO_PORT_OUT, A ; 1 cycle nop ; 1 cycle lsr A ; 1 cycle - out PORTA, A ; 1 cycle + out VIDEO_PORT_OUT, A ; 1 cycle nop ; 1 cycle lsr A ; 1 cycle - out PORTA, A ; 1 cycle + out VIDEO_PORT_OUT, A ; 1 cycle nop ; 1 cycle lsr A ; 1 cycle - out PORTA, A ; 1 cycle + out VIDEO_PORT_OUT, A ; 1 cycle nop ; 1 cycle lsr A ; 1 cycle - out PORTA, A ; 1 cycle + out VIDEO_PORT_OUT, A ; 1 cycle nop ; 1 cycle lsr A ; 1 cycle - out PORTA, A ; 1 cycle + out VIDEO_PORT_OUT, A ; 1 cycle ; chunk 41 ld A, X+ ; load pixel ; 2 cycles - out PORTA, A ; 1 cycle + out VIDEO_PORT_OUT, A ; 1 cycle nop ; 1 cycle lsr A ; 1 cycle - out PORTA, A ; 1 cycle + out VIDEO_PORT_OUT, A ; 1 cycle nop ; 1 cycle lsr A ; 1 cycle - out PORTA, A ; 1 cycle + out VIDEO_PORT_OUT, A ; 1 cycle nop ; 1 cycle lsr A ; 1 cycle - out PORTA, A ; 1 cycle + out VIDEO_PORT_OUT, A ; 1 cycle nop ; 1 cycle lsr A ; 1 cycle - out PORTA, A ; 1 cycle + out VIDEO_PORT_OUT, A ; 1 cycle nop ; 1 cycle lsr A ; 1 cycle - out PORTA, A ; 1 cycle + out VIDEO_PORT_OUT, A ; 1 cycle nop ; 1 cycle lsr A ; 1 cycle - out PORTA, A ; 1 cycle + out VIDEO_PORT_OUT, A ; 1 cycle nop ; 1 cycle lsr A ; 1 cycle - out PORTA, A ; 1 cycle + out VIDEO_PORT_OUT, A ; 1 cycle ; chunk 42 ld A, X+ ; load pixel ; 2 cycles - out PORTA, A ; 1 cycle + out VIDEO_PORT_OUT, A ; 1 cycle nop ; 1 cycle lsr A ; 1 cycle - out PORTA, A ; 1 cycle + out VIDEO_PORT_OUT, A ; 1 cycle nop ; 1 cycle lsr A ; 1 cycle - out PORTA, A ; 1 cycle + out VIDEO_PORT_OUT, A ; 1 cycle nop ; 1 cycle lsr A ; 1 cycle - out PORTA, A ; 1 cycle + out VIDEO_PORT_OUT, A ; 1 cycle nop ; 1 cycle lsr A ; 1 cycle - out PORTA, A ; 1 cycle + out VIDEO_PORT_OUT, A ; 1 cycle nop ; 1 cycle lsr A ; 1 cycle - out PORTA, A ; 1 cycle + out VIDEO_PORT_OUT, A ; 1 cycle nop ; 1 cycle lsr A ; 1 cycle - out PORTA, A ; 1 cycle + out VIDEO_PORT_OUT, A ; 1 cycle nop ; 1 cycle lsr A ; 1 cycle - out PORTA, A ; 1 cycle + out VIDEO_PORT_OUT, A ; 1 cycle ; chunk 43 ld A, X+ ; load pixel ; 2 cycles - out PORTA, A ; 1 cycle + out VIDEO_PORT_OUT, A ; 1 cycle nop ; 1 cycle lsr A ; 1 cycle - out PORTA, A ; 1 cycle + out VIDEO_PORT_OUT, A ; 1 cycle nop ; 1 cycle lsr A ; 1 cycle - out PORTA, A ; 1 cycle + out VIDEO_PORT_OUT, A ; 1 cycle nop ; 1 cycle lsr A ; 1 cycle - out PORTA, A ; 1 cycle + out VIDEO_PORT_OUT, A ; 1 cycle nop ; 1 cycle lsr A ; 1 cycle - out PORTA, A ; 1 cycle + out VIDEO_PORT_OUT, A ; 1 cycle nop ; 1 cycle lsr A ; 1 cycle - out PORTA, A ; 1 cycle + out VIDEO_PORT_OUT, A ; 1 cycle nop ; 1 cycle lsr A ; 1 cycle - out PORTA, A ; 1 cycle + out VIDEO_PORT_OUT, A ; 1 cycle nop ; 1 cycle lsr A ; 1 cycle - out PORTA, A ; 1 cycle + out VIDEO_PORT_OUT, A ; 1 cycle ; chunk 44 ld A, X+ ; load pixel ; 2 cycles - out PORTA, A ; 1 cycle + out VIDEO_PORT_OUT, A ; 1 cycle nop ; 1 cycle lsr A ; 1 cycle - out PORTA, A ; 1 cycle + out VIDEO_PORT_OUT, A ; 1 cycle nop ; 1 cycle lsr A ; 1 cycle - out PORTA, A ; 1 cycle + out VIDEO_PORT_OUT, A ; 1 cycle nop ; 1 cycle lsr A ; 1 cycle - out PORTA, A ; 1 cycle + out VIDEO_PORT_OUT, A ; 1 cycle nop ; 1 cycle lsr A ; 1 cycle - out PORTA, A ; 1 cycle + out VIDEO_PORT_OUT, A ; 1 cycle nop ; 1 cycle lsr A ; 1 cycle - out PORTA, A ; 1 cycle + out VIDEO_PORT_OUT, A ; 1 cycle nop ; 1 cycle lsr A ; 1 cycle - out PORTA, A ; 1 cycle + out VIDEO_PORT_OUT, A ; 1 cycle nop ; 1 cycle lsr A ; 1 cycle - out PORTA, A ; 1 cycle + out VIDEO_PORT_OUT, A ; 1 cycle ; chunk 45 ld A, X+ ; load pixel ; 2 cycles - out PORTA, A ; 1 cycle + out VIDEO_PORT_OUT, A ; 1 cycle nop ; 1 cycle lsr A ; 1 cycle - out PORTA, A ; 1 cycle + out VIDEO_PORT_OUT, A ; 1 cycle nop ; 1 cycle lsr A ; 1 cycle - out PORTA, A ; 1 cycle + out VIDEO_PORT_OUT, A ; 1 cycle nop ; 1 cycle lsr A ; 1 cycle - out PORTA, A ; 1 cycle + out VIDEO_PORT_OUT, A ; 1 cycle nop ; 1 cycle lsr A ; 1 cycle - out PORTA, A ; 1 cycle + out VIDEO_PORT_OUT, A ; 1 cycle nop ; 1 cycle lsr A ; 1 cycle - out PORTA, A ; 1 cycle + out VIDEO_PORT_OUT, A ; 1 cycle nop ; 1 cycle lsr A ; 1 cycle - out PORTA, A ; 1 cycle + out VIDEO_PORT_OUT, A ; 1 cycle nop ; 1 cycle lsr A ; 1 cycle - out PORTA, A ; 1 cycle + out VIDEO_PORT_OUT, A ; 1 cycle ; chunk 46 ld A, X+ ; load pixel ; 2 cycles - out PORTA, A ; 1 cycle + out VIDEO_PORT_OUT, A ; 1 cycle nop ; 1 cycle lsr A ; 1 cycle - out PORTA, A ; 1 cycle + out VIDEO_PORT_OUT, A ; 1 cycle nop ; 1 cycle lsr A ; 1 cycle - out PORTA, A ; 1 cycle + out VIDEO_PORT_OUT, A ; 1 cycle nop ; 1 cycle lsr A ; 1 cycle - out PORTA, A ; 1 cycle + out VIDEO_PORT_OUT, A ; 1 cycle nop ; 1 cycle lsr A ; 1 cycle - out PORTA, A ; 1 cycle + out VIDEO_PORT_OUT, A ; 1 cycle nop ; 1 cycle lsr A ; 1 cycle - out PORTA, A ; 1 cycle + out VIDEO_PORT_OUT, A ; 1 cycle nop ; 1 cycle lsr A ; 1 cycle - out PORTA, A ; 1 cycle + out VIDEO_PORT_OUT, A ; 1 cycle nop ; 1 cycle lsr A ; 1 cycle - out PORTA, A ; 1 cycle + out VIDEO_PORT_OUT, A ; 1 cycle ; chunk 47 ld A, X+ ; load pixel ; 2 cycles - out PORTA, A ; 1 cycle + out VIDEO_PORT_OUT, A ; 1 cycle nop ; 1 cycle lsr A ; 1 cycle - out PORTA, A ; 1 cycle + out VIDEO_PORT_OUT, A ; 1 cycle nop ; 1 cycle lsr A ; 1 cycle - out PORTA, A ; 1 cycle + out VIDEO_PORT_OUT, A ; 1 cycle nop ; 1 cycle lsr A ; 1 cycle - out PORTA, A ; 1 cycle + out VIDEO_PORT_OUT, A ; 1 cycle nop ; 1 cycle lsr A ; 1 cycle - out PORTA, A ; 1 cycle + out VIDEO_PORT_OUT, A ; 1 cycle nop ; 1 cycle lsr A ; 1 cycle - out PORTA, A ; 1 cycle + out VIDEO_PORT_OUT, A ; 1 cycle nop ; 1 cycle lsr A ; 1 cycle - out PORTA, A ; 1 cycle + out VIDEO_PORT_OUT, A ; 1 cycle nop ; 1 cycle lsr A ; 1 cycle - out PORTA, A ; 1 cycle + out VIDEO_PORT_OUT, A ; 1 cycle ; chunk 48 ld A, X+ ; load pixel ; 2 cycles - out PORTA, A ; 1 cycle + out VIDEO_PORT_OUT, A ; 1 cycle nop ; 1 cycle lsr A ; 1 cycle - out PORTA, A ; 1 cycle + out VIDEO_PORT_OUT, A ; 1 cycle nop ; 1 cycle lsr A ; 1 cycle - out PORTA, A ; 1 cycle + out VIDEO_PORT_OUT, A ; 1 cycle nop ; 1 cycle lsr A ; 1 cycle - out PORTA, A ; 1 cycle + out VIDEO_PORT_OUT, A ; 1 cycle nop ; 1 cycle lsr A ; 1 cycle - out PORTA, A ; 1 cycle + out VIDEO_PORT_OUT, A ; 1 cycle nop ; 1 cycle lsr A ; 1 cycle - out PORTA, A ; 1 cycle + out VIDEO_PORT_OUT, A ; 1 cycle nop ; 1 cycle lsr A ; 1 cycle - out PORTA, A ; 1 cycle + out VIDEO_PORT_OUT, A ; 1 cycle nop ; 1 cycle lsr A ; 1 cycle - out PORTA, A ; 1 cycle + out VIDEO_PORT_OUT, A ; 1 cycle ; chunk 49 ld A, X+ ; load pixel ; 2 cycles - out PORTA, A ; 1 cycle + out VIDEO_PORT_OUT, A ; 1 cycle nop ; 1 cycle lsr A ; 1 cycle - out PORTA, A ; 1 cycle + out VIDEO_PORT_OUT, A ; 1 cycle nop ; 1 cycle lsr A ; 1 cycle - out PORTA, A ; 1 cycle + out VIDEO_PORT_OUT, A ; 1 cycle nop ; 1 cycle lsr A ; 1 cycle - out PORTA, A ; 1 cycle + out VIDEO_PORT_OUT, A ; 1 cycle nop ; 1 cycle lsr A ; 1 cycle - out PORTA, A ; 1 cycle + out VIDEO_PORT_OUT, A ; 1 cycle nop ; 1 cycle lsr A ; 1 cycle - out PORTA, A ; 1 cycle + out VIDEO_PORT_OUT, A ; 1 cycle nop ; 1 cycle lsr A ; 1 cycle - out PORTA, A ; 1 cycle + out VIDEO_PORT_OUT, A ; 1 cycle nop ; 1 cycle lsr A ; 1 cycle - out PORTA, A ; 1 cycle + out VIDEO_PORT_OUT, A ; 1 cycle ; chunk 50 ld A, X+ ; load pixel ; 2 cycles - out PORTA, A ; 1 cycle + out VIDEO_PORT_OUT, A ; 1 cycle nop ; 1 cycle lsr A ; 1 cycle - out PORTA, A ; 1 cycle + out VIDEO_PORT_OUT, A ; 1 cycle nop ; 1 cycle lsr A ; 1 cycle - out PORTA, A ; 1 cycle + out VIDEO_PORT_OUT, A ; 1 cycle nop ; 1 cycle lsr A ; 1 cycle - out PORTA, A ; 1 cycle + out VIDEO_PORT_OUT, A ; 1 cycle nop ; 1 cycle lsr A ; 1 cycle - out PORTA, A ; 1 cycle + out VIDEO_PORT_OUT, A ; 1 cycle nop ; 1 cycle lsr A ; 1 cycle - out PORTA, A ; 1 cycle + out VIDEO_PORT_OUT, A ; 1 cycle nop ; 1 cycle lsr A ; 1 cycle - out PORTA, A ; 1 cycle + out VIDEO_PORT_OUT, A ; 1 cycle nop ; 1 cycle lsr A ; 1 cycle - out PORTA, A ; 1 cycle + out VIDEO_PORT_OUT, A ; 1 cycle ; chunk 51 ld A, X+ ; load pixel ; 2 cycles - out PORTA, A ; 1 cycle + out VIDEO_PORT_OUT, A ; 1 cycle nop ; 1 cycle lsr A ; 1 cycle - out PORTA, A ; 1 cycle + out VIDEO_PORT_OUT, A ; 1 cycle nop ; 1 cycle lsr A ; 1 cycle - out PORTA, A ; 1 cycle + out VIDEO_PORT_OUT, A ; 1 cycle nop ; 1 cycle lsr A ; 1 cycle - out PORTA, A ; 1 cycle + out VIDEO_PORT_OUT, A ; 1 cycle nop ; 1 cycle lsr A ; 1 cycle - out PORTA, A ; 1 cycle + out VIDEO_PORT_OUT, A ; 1 cycle nop ; 1 cycle lsr A ; 1 cycle - out PORTA, A ; 1 cycle + out VIDEO_PORT_OUT, A ; 1 cycle nop ; 1 cycle lsr A ; 1 cycle - out PORTA, A ; 1 cycle + out VIDEO_PORT_OUT, A ; 1 cycle nop ; 1 cycle lsr A ; 1 cycle - out PORTA, A ; 1 cycle + out VIDEO_PORT_OUT, A ; 1 cycle ; chunk 52 ld A, X+ ; load pixel ; 2 cycles - out PORTA, A ; 1 cycle + out VIDEO_PORT_OUT, A ; 1 cycle nop ; 1 cycle lsr A ; 1 cycle - out PORTA, A ; 1 cycle + out VIDEO_PORT_OUT, A ; 1 cycle nop ; 1 cycle lsr A ; 1 cycle - out PORTA, A ; 1 cycle + out VIDEO_PORT_OUT, A ; 1 cycle nop ; 1 cycle lsr A ; 1 cycle - out PORTA, A ; 1 cycle + out VIDEO_PORT_OUT, A ; 1 cycle nop ; 1 cycle lsr A ; 1 cycle - out PORTA, A ; 1 cycle + out VIDEO_PORT_OUT, A ; 1 cycle nop ; 1 cycle lsr A ; 1 cycle - out PORTA, A ; 1 cycle + out VIDEO_PORT_OUT, A ; 1 cycle nop ; 1 cycle lsr A ; 1 cycle - out PORTA, A ; 1 cycle + out VIDEO_PORT_OUT, A ; 1 cycle nop ; 1 cycle lsr A ; 1 cycle - out PORTA, A ; 1 cycle + out VIDEO_PORT_OUT, A ; 1 cycle ret