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penguin86
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pato-z80-home-computer
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186689fd5c
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3 Commits
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Daniele Verducci su MatissePenguin
186689fd5c
UART: Thinking how to delay sampling to mid clock
2021-03-06 14:09:38 +01:00
Daniele Verducci su MatissePenguin
35cb230ea6
Working UART simulation without rx clock sync
2021-03-06 12:59:01 +01:00
Daniele Verducci (ZenPenguin)
f414a14c09
WIP UART Rx simulation with Logisim
2021-03-05 08:58:22 +01:00