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1ceee757e3
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WIP routing mainboard
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2021-03-24 22:38:25 +01:00 |
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0727b793c3
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Connector description
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2021-03-21 17:59:52 +01:00 |
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9516ec36ba
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Schematics: assigned footprints, created ratsnest
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2021-03-20 20:29:46 +01:00 |
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6796c134f3
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Schematic complete, commit before assigning footprints
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2021-03-20 19:01:09 +01:00 |
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3c02ac0640
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Almost finished transcribing mainboard schematics
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2021-03-20 10:35:38 +01:00 |
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3fe353db2e
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Memory decoding, WIP IO decoding
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2021-03-19 08:58:05 +01:00 |
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f179a1d8f5
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WIP Schematics
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2021-03-17 08:58:29 +01:00 |
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2a0750a06e
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Reset circuit
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2021-03-15 20:12:23 +01:00 |
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d2c3aa9bb2
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Removed symbol using third party library
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2021-03-15 19:30:11 +01:00 |
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6890e352c1
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WIP Mainboard schematics: added CPU, RAM, ROM, Addr and data bus.
TODO: Fix external dependency
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2021-03-15 08:58:44 +01:00 |
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