85 lines
2.8 KiB
NASM
85 lines
2.8 KiB
NASM
; VIDEO COMPOSITE PAL IO DEVICE
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; Implemented following timings in http://blog.retroleum.co.uk/electronics-articles/pal-tv-timing-and-voltages/
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; Every line, for 52 times, it loads a byte from memory into PORTA register and then shifts the byte to the left to show another bit (do it 7 times)
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; This also displays byte's MSB pixel "for free", as the video pin is PD7 (last bit of PORTA).
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;
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; INTERFACING WITH PAT80:
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; Use PortB as data port. Before writing anything, issue a read (pin RW HIGH) and check the busy pin on the data port.
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; If the busy pin is high, retry reading until goes low. When the busy pin goes low, we have... TODO
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;
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; ELECTRONICALLY:
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; The data port D0 (= PB0) is tied to ground with a 1KOhm resistance. When the MC is busy drawing the screen, the data port is in
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; high impedance state, so that avoids causing bus contention, but when read returns a 0bXXXXXXX0 byte. When the MC starts vsync,
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; begins checking the port for data... TODO
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;
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; PINS:
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; Video pin: PA0 (pin 1)
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; Sync pin: PC0 (pin 22)
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; Debug hsync pin: PC1 (pin 23)
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;
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.include "m1284def.inc" ; Atmega 1280 device definition
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; reserved registers
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.def A = r0 ; accumulator
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.def STATUS = r25 ; signal status (see STATUS TABLE)
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.def POS_COARSE = Z ; coarse position (aligned to character column)
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.def POS_COARSE_H = r31
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.def POS_COARSE_L = r30
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.def POS_FINE = r24 ; fine position (bit inside coarse-position-pointed byte)
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; define constant
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.equ SYNC_PIN = PC0 ; Sync pin (pin 22)
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.equ DEBUG_PIN = PC1 ; DEBUG: Single vertical sync pulse to trigger oscilloscope (pin 23)
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.equ CLK_PIN = PD7
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; memory
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.equ FRAMEBUFFER = 0x100
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; start vector
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.org 0x0000
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rjmp main ; reset vector: jump to main label
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.org 0x001E
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rjmp on_tim1_ovf ; interrupt for timer 1 overflow (used by video generation)
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.org 0x40
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; main program
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main:
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; pins setup
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sbi DDRC, SYNC_PIN ; set pin as output
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sbi DDRC, DEBUG_PIN ; set pin as output
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cbi DDRD, CLK_PIN ; set pin as input
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ldi r16, 0xFF
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out DDRA, r16 ; set port as output (contains video pin)
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ldi r16, 0x00
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out DDRB, r16 ; set port as input (used as data bus)
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; *** timer setup (use 16-bit counter TC1) ***
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; The Power Reduction TC1 and TC3 bits in the Power Reduction Registers (PRR0.PRTIM1 and
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; PRR1.PRTIM3) must be written to zero to enable the TC1 and TC3 module.
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ldi r16, 0b00000000
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sts PRR0, r16
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; Set timer prescaler to 1:1
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LDI r16,0b00000001
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sts TCCR1B,r16
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; Enambe timer1 overflow interrupt
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LDI r16,0b00000001
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STS TIMSK1,r16
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; Enable interrupts globally
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SEI
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; Timer setup completed.
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; Wait for data (it never exits)
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jmp comm_init
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forever:
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jmp forever
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.include "video_generator.asm" ; Asyncronous timer-interrupt-based video generation
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.include "character_generator.asm" ; Character generator
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.include "communication.asm" ; Communication with Pat80
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