82 lines
2.2 KiB
NASM
82 lines
2.2 KiB
NASM
; VIDEO COMPOSITE PAL IO DEVICE
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; Implemented following timings in http://blog.retroleum.co.uk/electronics-articles/pal-tv-timing-and-voltages/
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.include "atmega1284definition.asm"
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; define constant
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.equ SYNC_PIN = PD7 ; Sync pin is on Port D 7 (pin 21)
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.equ VIDEO_PIN = PD6 ; Video pin is on Port D 6 (pin 20)
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; start vector
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.org 0x0000
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rjmp main ; jump to main label
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; main program
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main:
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sbi DDRD, SYNC_PIN ; set pin as output
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sbi DDRD, VIDEO_PIN ; set pin as output
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v_refresh_loop:
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; start 5 long sync pulses
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; end 5 long sync pulses
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; start 5 short sync pulses
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; end 5 short sync pulses
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; start 304 picture lines
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ldi r16, 2
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h_picture_outer_loop:
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ldi r17, 152 ; line counter
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h_picture_loop:
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; start line sync: 4uS, 96 cycles @ 24Mhz
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cbi PORTD, SYNC_PIN ; sync goes low (0v) ; 2 cycle
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ldi r18, 32 ; 1 cycle
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l_sync_pulse_loop: ; requires 3 cpu cycles
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dec r18 ; 1 cycle
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brne l_sync_pulse_loop ; 2 cycle if true, 1 if false
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sbi PORTD, SYNC_PIN ; sync goes high (0.3v)
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; end line sync
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; start back porch: 8uS, 192 cycles @ 24Mhz
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ldi r18, 64 ; 1 cycle
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l_sync_back_porch_loop:
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dec r18 ; 1 cycle
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brne l_sync_back_porch_loop ; 2 cycle if true, 1 if false
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; end back porch
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; start image: 52uS, 1247 cycles @ 24Mhz
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; 3 bande da 416 cicli
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sbi PORTD, VIDEO_PIN ; video goes high ; 2 cycle
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ldi r18, 138 ; 1 cycle
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l_sync_video_loop1:
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dec r18 ; 1 cycle
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brne l_sync_video_loop1 ; 2 cycle if true, 1 if false
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cbi PORTD, VIDEO_PIN ; video goes low
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ldi r18, 137 ; 1 cycle
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l_sync_video_loop2:
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dec r18 ; 1 cycle
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brne l_sync_video_loop2 ; 2 cycle if true, 1 if false
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sbi PORTD, VIDEO_PIN ; video goes high
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ldi r18, 138 ; 1 cycle
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l_sync_video_loop3:
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dec r18 ; 1 cycle
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brne l_sync_video_loop3 ; 2 cycle if true, 1 if false
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cbi PORTD, VIDEO_PIN ; video goes low
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; end image
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dec r17 ; decrement line counter
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brne h_picture_loop ; if not 0, repeat h_picture_loop
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dec r16 ; decrement outside counter
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brne h_picture_outer_loop ; if not 0, repeat h_picture_loop
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; end picture lines
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