Ported to Python3

src/z80/gui.py

@@ -1,10 +1,11 @@
 import sys
  
-from PySide.QtCore import *
-from PySide.QtGui import *
-from PySide.QtWebKit import * 
+from PySide2.QtCore import *
+from PySide2.QtGui import *
+from PySide2.QtWidgets import *
+from PySide2.QtWebEngineWidgets import * 
 
-from cStringIO import StringIO
+from io import StringIO
 
 class RegistersGUI(QWidget):
     _addresses = [0x80, 0x81]
@@ -136,7 +137,7 @@ class RegistersGUI(QWidget):
         vbox=QVBoxLayout()
         self.setLayout(vbox)
 
-        self._view = QWebView()
+        self._view = QWebEngineView(self)
         vbox.addWidget(self._view)
         
         
@@ -179,7 +180,7 @@ class MemoryView(QWidget):
         self._memory = memory
         self._registers = registers
         self._update_sgl.connect(self._update)
-        self._web_view = QWebView()
+        self._web_view = QWebEngineView(self)
         vbox = QVBoxLayout()
         self.setLayout(vbox)
         

src/z80/instructions.py

@@ -1,6 +1,6 @@
 import copy
 import logging
-from util import *
+from . util import *
 import sys
 
 class instruction(object):
@@ -63,9 +63,9 @@ class InstructionSet():
         for i in dir(self):
             f = getattr(self, i)
             if f.__class__ == Instruction:
-                print i, ":"
+                print (i, ":")
                 for o in f.opcode_args:
-                    print o
+                    print (o)
                     ff = copy.copy(f)
                     ff.registers = self._registers
                     ff.args = o[1]
@@ -86,7 +86,7 @@ class InstructionSet():
                         else:
                             opargs = ((o[0], ), o[1])
                     for n, i in enumerate(opargs[0][:-1]):
-                        if d.has_key(i):
+                        if i in d:
                             d = d[i]
                         elif i == "-":
                             ff.operands.append(n)
@@ -120,7 +120,7 @@ class InstructionSet():
         if self.is_two_parter(ins):
             return self._instructions[ins]
         else:
-            if self._instructions[0].has_key(ins): 
+            if ins in self._instructions[0]: 
                 return self._instructions[0][ins]
             raise AttributeError("Unknown opcode")
 
@@ -141,7 +141,7 @@ class InstructionSet():
         self._instruction_composer = []
         
     def is_two_parter(self, ins):
-        return self._instructions.has_key(ins)
+        return ins in self._instructions
 
     #----------------------------------------------------------------------
 

src/z80/io.py

@@ -1,7 +1,8 @@
 import sys
  
-from PySide.QtCore import *
-from PySide.QtGui import *
+from PySide2.QtCore import *
+from PySide2.QtGui import *
+from PySide2.QtWidgets import *
 
 class IO(object):
     _addresses = []
@@ -12,7 +13,7 @@ class IO(object):
     
 class Interruptable(object):
     def interrupt(self):
-        print "interrupt"
+        print ("interrupt")
         pass
     
 class Console(QTextEdit, IO):
@@ -35,7 +36,7 @@ class Console(QTextEdit, IO):
         self._send_queue = None
         
     def read(self, address):
-        print "READ ", address
+        print ("READ ", address)
         if address == 0x80:
             v =  ((1 << 1) | # RTS
                   ((self._send_queue is not None) << 0) | # interrupt?
@@ -51,7 +52,7 @@ class Console(QTextEdit, IO):
     
     @Slot(int, int)
     def write(self, address, value):
-        print "------> WRITE ", address
+        print ("------> WRITE ", address)
         self._wrt_sgnl.emit(address, value)
         
     def _write(self, address, value):

src/z80/registers.py

@@ -68,7 +68,7 @@ class Registers(dict):
             self[attr] = val
 
     def __getattr__(self, reg):
-        if self.has_key(reg):
+        if reg in self:
             return self[reg]
         elif reg in ["HL", "AF", "BC", "DE"]:
             return self[reg[0]] << 8 |  self[reg[1]]

src/z80/util.py

@@ -105,7 +105,7 @@ def add8(a, b, registers, S=True, Z=True, H=True,
 def add16(a, b, registers):
     """ add a and b,  return result and set flags """
     res = a + b
-    print a, "+",b,"=",res
+    print (a, "+",b,"=",res)
     registers.condition.S = (res >> 15) &  0x01
     registers.condition.Z = (res == 0)
     if ((a & 0xFFF) + (b & 0xFFF)) > 0xFFF :
@@ -126,7 +126,7 @@ def add16(a, b, registers):
 def subtract16(a, b, registers):
     """ subtract b from a,  return result and set flags """
     res = a - b
-    print a, "-", b, "=", res, "(", hex(res), ")"
+    print (a, "-", b, "=", res, "(", hex(res), ")")
     registers.condition.S = (res >> 15) &  0x01
     registers.condition.N = 1
     registers.condition.Z = (res == 0)

src/z80sbc.py

@@ -4,8 +4,9 @@ import copy
 
 from time import sleep, time
 import sys
-from PySide.QtCore import *
-from PySide.QtGui import *
+from PySide2.QtCore import *
+from PySide2.QtGui import *
+from PySide2.QtWidgets import *
 
 import threading
 
@@ -58,7 +59,7 @@ class Z80SBC(io.Interruptable):
             self.registers.IFF = False
             self._interrupted = False
             if self.registers.IM == 1:
-                print "!!! Interrupt  !!!"
+                print ("!!! Interrupt  !!!")
                 ins, args = self.instructions << 0xCD
                 ins, args = self.instructions << 0x38
                 ins, args = self.instructions << 0x00
@@ -102,7 +103,7 @@ if __name__ == '__main__':
         while True:
             # t = time()
             ins,  args =  mach.step_instruction()
-            print ins.assembler(args)
+            print (ins.assembler(args))
             sleep(0.00000001)
             # print (time() - t) / ins.tstates