Ported to Python3
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743a294788
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89fd52113a
@ -3,8 +3,8 @@ import copy
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from time import sleep, time
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import sys
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from PySide.QtCore import *
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from PySide.QtGui import *
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from PySide2.QtCore import *
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from PySide2.QtGui import *
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import threading
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import os
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@ -32,7 +32,7 @@ class Z80Tester(io.Interruptable):
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self.registers.IFF = False
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self._interrupted = False
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if self.registers.IM == 1:
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print "!!! Interrupt !!!"
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print ("!!! Interrupt !!!")
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ins, args = self.instructions << 0xCD
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ins, args = self.instructions << 0x38
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ins, args = self.instructions << 0x00
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@ -55,7 +55,7 @@ class Z80Tester(io.Interruptable):
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address = i & 0xFF
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#data[n] = self._iomap.address[address].read(address)
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data[n] = self.registers.A
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print "Read IO ",
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print ("Read IO "),
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raise Exception("Skip.")
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wrt = ins.execute(data, args)
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for i in wrt:
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@ -65,14 +65,14 @@ class Z80Tester(io.Interruptable):
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#iomap.address[address].write.emit(address, i[1])
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#self._iomap.address[address].write(address, i[1])
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#print (chr(i[1]))
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print "Write IO ",
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print ("Write IO "),
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raise Exception("Skip.")
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else:
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try:
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self._memory[i[0]] = i[1]
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except:
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print i
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print trace
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print (i)
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print (trace)
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raise
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return ins.tstates, trace
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@ -131,9 +131,9 @@ if __name__ == '__main__':
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base += 1
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print ": Test '%s' : "%(str(test_key)),
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print (": Test '%s' : "%(str(test_key))),
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if test_key.startswith("27"):
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print "SKIPPED"
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print ("SKIPPED")
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continue
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trace = ""
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taken= 0
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@ -142,23 +142,23 @@ if __name__ == '__main__':
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states, asm = mach.step_instruction()
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taken += states
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trace += "%d/%d\t%d\t" % (taken, tstates, states) + asm
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except Exception, e:
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if e.message == "Can't decode instruction.":
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print " - NO INSTRUCTION"
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except Exception as e:
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if e == "Can't decode instruction.":
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print (" - NO INSTRUCTION")
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mach.instructions.reset_composer()
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continue
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elif e.message == "Skip.":
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print "Skipped."
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elif e == "Skip.":
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print ("Skipped.")
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mach.instructions.reset_composer()
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continue
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else:
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print "FAULTY"
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print ("FAULTY")
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mach.instructions.reset_composer()
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raise
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expected_lines = results.split('\n')
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if expected_lines[0] != test_key:
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print "Test expectation mismatch"
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print ("Test expectation mismatch")
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sys.exit(1)
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i = 1
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while expected_lines[i].startswith(" "):
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@ -203,14 +203,14 @@ if __name__ == '__main__':
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#if mach.registers.R != regs2[1]:
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#raise Exception("Bad register")
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if mach.registers.IFF != (regs2[2] == "1"):
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print "Bad interrups flag flop"
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print regs2[2]
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print mach.registers.IFF
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print ("Bad interrups flag flop")
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print (regs2[2])
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print (mach.registers.IFF)
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raise Exception("Bad register")
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if mach.registers.IFF2 != (regs2[3] == "1"):
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print "Bad interrups flag flop"
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print regs2[3]
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print mach.registers.IFF2
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print ("Bad interrups flag flop")
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print (regs2[3])
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print (mach.registers.IFF2)
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raise Exception("Bad register")
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#if mach.registers.IFF2 != (regs2[3] == "1"):
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#raise Exception("Bad register")
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@ -233,35 +233,36 @@ if __name__ == '__main__':
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if mach._memory[base] != int(val, 16):
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raise Exception("Memory mismatch")
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base += 1
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except Exception, e:
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print "FAILED:",e.message
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except Exception as e:
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print ("FAILED:",e.message)
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fails += 1
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continue
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print "TRACE:"
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print trace
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print
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print ("TRACE:")
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print (trace)
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print ("")
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flags = ["S", "Z", "F5", "H", "F3", "PV", "N", "C"]
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s = ""
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for i, f in enumerate(flags):
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s += f+':' + str((regs[0] >> (7 - i)) & 0x01) + ' '
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print "\nTarget flags: ", s
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print ("\nTarget flags: ", s)
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s = ""
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for i, f in enumerate(flags):
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s += f+':' + str((mach.registers.F >> (7 - i)) & 0x01) + ' '
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print "Actual flags: ", s
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print ("Actual flags: ", s)
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print
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print "--INITIAL--\n", t, "\n--TARGET--\n", results,"\n==--==\n"
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print ("--INITIAL--\n", t, "\n--TARGET--\n", results,"\n==--==\n")
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regs = ['PC', 'SP', 'I',
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'A', 'F', 'B', 'C',
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'D', 'E', 'H', 'L',
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'IFF']
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regsr = ['IX', 'IY', 'R','A_', 'F_', 'B_', 'C_','D_', 'E_','H_', 'L_', 'IM']
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print "Registers:"
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print ("Registers:")
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for rl, rr in zip(regs, regsr):
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print rl, ": {0:X}".format( mach.registers[rl]), "\t\t", rr, ": {0:X}".format( mach.registers[rr])
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print (rl, ": {0:X}".format( mach.registers[rl]), "\t\t", rr, ": {0:X}".format( mach.registers[rr]))
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raise
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print "PASSED"
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print ("PASSED")
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passes += 1
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print "Failed:", fails
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print "Passed:", passes
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print ("Failed:", fails)
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print ("Passed:", passes)
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print ("Passed:", passes)
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@ -1,10 +1,11 @@
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import sys
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from PySide.QtCore import *
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from PySide.QtGui import *
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from PySide.QtWebKit import *
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from PySide2.QtCore import *
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from PySide2.QtGui import *
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from PySide2.QtWidgets import *
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from PySide2.QtWebEngineWidgets import *
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from cStringIO import StringIO
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from io import StringIO
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class RegistersGUI(QWidget):
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_addresses = [0x80, 0x81]
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@ -136,7 +137,7 @@ class RegistersGUI(QWidget):
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vbox=QVBoxLayout()
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self.setLayout(vbox)
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self._view = QWebView()
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self._view = QWebEngineView(self)
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vbox.addWidget(self._view)
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@ -179,7 +180,7 @@ class MemoryView(QWidget):
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self._memory = memory
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self._registers = registers
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self._update_sgl.connect(self._update)
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self._web_view = QWebView()
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self._web_view = QWebEngineView(self)
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vbox = QVBoxLayout()
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self.setLayout(vbox)
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@ -1,6 +1,6 @@
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import copy
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import logging
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from util import *
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from . util import *
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import sys
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class instruction(object):
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@ -63,9 +63,9 @@ class InstructionSet():
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for i in dir(self):
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f = getattr(self, i)
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if f.__class__ == Instruction:
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print i, ":"
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print (i, ":")
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for o in f.opcode_args:
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print o
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print (o)
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ff = copy.copy(f)
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ff.registers = self._registers
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ff.args = o[1]
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@ -86,7 +86,7 @@ class InstructionSet():
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else:
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opargs = ((o[0], ), o[1])
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for n, i in enumerate(opargs[0][:-1]):
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if d.has_key(i):
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if i in d:
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d = d[i]
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elif i == "-":
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ff.operands.append(n)
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@ -120,7 +120,7 @@ class InstructionSet():
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if self.is_two_parter(ins):
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return self._instructions[ins]
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else:
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if self._instructions[0].has_key(ins):
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if ins in self._instructions[0]:
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return self._instructions[0][ins]
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raise AttributeError("Unknown opcode")
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@ -141,7 +141,7 @@ class InstructionSet():
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self._instruction_composer = []
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def is_two_parter(self, ins):
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return self._instructions.has_key(ins)
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return ins in self._instructions
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#----------------------------------------------------------------------
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@ -1,7 +1,8 @@
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import sys
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from PySide.QtCore import *
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from PySide.QtGui import *
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from PySide2.QtCore import *
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from PySide2.QtGui import *
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from PySide2.QtWidgets import *
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class IO(object):
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_addresses = []
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@ -12,7 +13,7 @@ class IO(object):
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class Interruptable(object):
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def interrupt(self):
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print "interrupt"
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print ("interrupt")
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pass
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class Console(QTextEdit, IO):
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@ -35,7 +36,7 @@ class Console(QTextEdit, IO):
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self._send_queue = None
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def read(self, address):
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print "READ ", address
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print ("READ ", address)
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if address == 0x80:
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v = ((1 << 1) | # RTS
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((self._send_queue is not None) << 0) | # interrupt?
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@ -51,7 +52,7 @@ class Console(QTextEdit, IO):
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@Slot(int, int)
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def write(self, address, value):
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print "------> WRITE ", address
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print ("------> WRITE ", address)
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self._wrt_sgnl.emit(address, value)
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def _write(self, address, value):
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@ -68,7 +68,7 @@ class Registers(dict):
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self[attr] = val
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def __getattr__(self, reg):
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if self.has_key(reg):
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if reg in self:
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return self[reg]
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elif reg in ["HL", "AF", "BC", "DE"]:
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return self[reg[0]] << 8 | self[reg[1]]
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@ -105,7 +105,7 @@ def add8(a, b, registers, S=True, Z=True, H=True,
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def add16(a, b, registers):
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""" add a and b, return result and set flags """
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res = a + b
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print a, "+",b,"=",res
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print (a, "+",b,"=",res)
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registers.condition.S = (res >> 15) & 0x01
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registers.condition.Z = (res == 0)
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if ((a & 0xFFF) + (b & 0xFFF)) > 0xFFF :
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@ -126,7 +126,7 @@ def add16(a, b, registers):
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def subtract16(a, b, registers):
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""" subtract b from a, return result and set flags """
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res = a - b
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print a, "-", b, "=", res, "(", hex(res), ")"
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print (a, "-", b, "=", res, "(", hex(res), ")")
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registers.condition.S = (res >> 15) & 0x01
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registers.condition.N = 1
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registers.condition.Z = (res == 0)
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@ -4,8 +4,9 @@ import copy
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from time import sleep, time
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import sys
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from PySide.QtCore import *
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from PySide.QtGui import *
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from PySide2.QtCore import *
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from PySide2.QtGui import *
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from PySide2.QtWidgets import *
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import threading
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@ -58,7 +59,7 @@ class Z80SBC(io.Interruptable):
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self.registers.IFF = False
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self._interrupted = False
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if self.registers.IM == 1:
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print "!!! Interrupt !!!"
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print ("!!! Interrupt !!!")
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ins, args = self.instructions << 0xCD
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ins, args = self.instructions << 0x38
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ins, args = self.instructions << 0x00
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@ -102,7 +103,7 @@ if __name__ == '__main__':
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while True:
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# t = time()
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ins, args = mach.step_instruction()
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print ins.assembler(args)
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print (ins.assembler(args))
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sleep(0.00000001)
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# print (time() - t) / ins.tstates
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