2021-01-02 19:54:17 +01:00
|
|
|
; VIDEO COMPOSITE PAL IO DEVICE
|
2021-01-08 16:12:46 +01:00
|
|
|
;
|
2021-07-11 09:49:42 +02:00
|
|
|
; @language: AVR ASM
|
|
|
|
;
|
|
|
|
; This file is part of Pat80 IO Devices.
|
|
|
|
;
|
|
|
|
; Pat80 IO Devices is free software: you can redistribute it and/or modify
|
|
|
|
; it under the terms of the GNU General Public License as published by
|
|
|
|
; the Free Software Foundation, either version 3 of the License, or
|
|
|
|
; (at your option) any later version.
|
|
|
|
;
|
|
|
|
; Pat80 IO Devices is distributed in the hope that it will be useful,
|
|
|
|
; but WITHOUT ANY WARRANTY; without even the implied warranty of
|
|
|
|
; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
|
|
|
; GNU General Public License for more details.
|
|
|
|
;
|
|
|
|
; You should have received a copy of the GNU General Public License
|
|
|
|
; along with Pat80 IO Devices. If not, see <http://www.gnu.org/licenses/>.
|
|
|
|
;
|
|
|
|
;
|
2021-01-10 07:22:55 +01:00
|
|
|
; INTERFACING WITH PAT80:
|
|
|
|
; Use PortB as data port. Before writing anything, issue a read (pin RW HIGH) and check the busy pin on the data port.
|
2021-01-10 10:50:34 +01:00
|
|
|
; If the busy pin is high, retry reading until goes low. When the busy pin goes low, we have... TODO
|
2021-01-10 07:22:55 +01:00
|
|
|
;
|
|
|
|
; ELECTRONICALLY:
|
2021-01-24 11:27:40 +01:00
|
|
|
; The data port PB0 is tied to ground with a 1KOhm resistance. When the MC is busy drawing the screen, the data port is in
|
2021-01-10 07:22:55 +01:00
|
|
|
; high impedance state, so that avoids causing bus contention, but when read returns a 0bXXXXXXX0 byte. When the MC starts vsync,
|
|
|
|
; begins checking the port for data... TODO
|
|
|
|
;
|
2021-01-08 16:12:46 +01:00
|
|
|
; PINS:
|
2021-01-24 11:27:40 +01:00
|
|
|
; Video:
|
|
|
|
; Video pin: PA0 (pin 1) (but all PORTA is used)
|
|
|
|
; Sync pin: PC0 (pin 22)
|
|
|
|
; Communication:
|
|
|
|
; Data port is PORTB [INPUT]
|
|
|
|
; CLK (clock) signal is on PORTD0 [INPUT]
|
|
|
|
; RS (register select) on PORTD1 [INPUT]
|
|
|
|
; BUSY signal is on PORTD2 [OUTPUT]
|
|
|
|
; Debug:
|
|
|
|
; Debug hsync single pulse on pin: PC1 (pin 23) (may be disabled)
|
2021-01-09 21:24:27 +01:00
|
|
|
;
|
2021-01-02 19:54:17 +01:00
|
|
|
|
2021-01-19 08:36:01 +01:00
|
|
|
.include "m1284def.inc" ; Atmega 1280 device definition
|
2021-01-02 16:33:51 +01:00
|
|
|
|
2021-01-26 20:52:53 +01:00
|
|
|
; *** reserved registers ***
|
2021-02-25 23:26:13 +01:00
|
|
|
; Video generator registers:
|
|
|
|
; X(R27, R26)
|
2021-01-17 10:58:04 +01:00
|
|
|
.def STATUS = r25 ; signal status (see STATUS TABLE)
|
2021-02-25 23:26:13 +01:00
|
|
|
.def VG_HIGH_ACCUM = r24 ; an accumulator in high registers to be used only by video_generator in interrupt
|
2021-01-26 20:52:53 +01:00
|
|
|
.def LINE_COUNTER = r23
|
2021-01-24 11:27:40 +01:00
|
|
|
|
2021-02-25 23:26:13 +01:00
|
|
|
; Character generator registers:
|
|
|
|
.def POS_COLUMN = r22 ; POS_COLUMN (0-46) represents the character/chunk column
|
|
|
|
.def POS_ROWP = r21 ; POS_ROWP (0-255) represent the chunk row. The caracter row is POS_ROWP/FONT_HEIGHT
|
|
|
|
.def HIGH_ACCUM = r20 ; an accumulator in high registers to be used outside of interrupts
|
|
|
|
.def A = r0 ; general purpose accumulator to be used outside of interrupts
|
|
|
|
|
|
|
|
; Hardware pins and ports
|
2021-01-24 11:27:40 +01:00
|
|
|
.equ VIDEO_PORT_OUT = PORTA ; Used all PORTA, but connected only PA0
|
2021-01-10 10:50:34 +01:00
|
|
|
.equ SYNC_PIN = PC0 ; Sync pin (pin 22)
|
|
|
|
.equ DEBUG_PIN = PC1 ; DEBUG: Single vertical sync pulse to trigger oscilloscope (pin 23)
|
2021-02-25 23:26:13 +01:00
|
|
|
.equ DATA_PORT_IN = PIND
|
|
|
|
.equ CLK_PIN = PC2
|
|
|
|
.equ RS_PIN = PC3
|
|
|
|
.equ BUSY_PIN = PC4
|
|
|
|
|
|
|
|
; Memory map
|
|
|
|
.equ FRAMEBUFFER = 0x0F70
|
|
|
|
.equ FRAMEBUFFER_END = 0x3C00
|
2021-02-20 20:33:55 +01:00
|
|
|
.equ SCREEN_HEIGHT = 248
|
2021-01-02 16:33:51 +01:00
|
|
|
|
|
|
|
; start vector
|
|
|
|
.org 0x0000
|
2021-01-16 19:54:32 +01:00
|
|
|
rjmp main ; reset vector: jump to main label
|
|
|
|
.org 0x001E
|
2021-01-19 08:36:01 +01:00
|
|
|
rjmp on_tim1_ovf ; interrupt for timer 1 overflow (used by video generation)
|
2021-01-02 16:33:51 +01:00
|
|
|
|
2021-01-16 19:54:32 +01:00
|
|
|
.org 0x40
|
2021-01-02 16:33:51 +01:00
|
|
|
; main program
|
|
|
|
main:
|
2021-02-20 17:02:13 +01:00
|
|
|
; **** I/O SETUP ****
|
|
|
|
|
2021-01-10 10:50:34 +01:00
|
|
|
; pins setup
|
2021-01-06 00:19:15 +01:00
|
|
|
sbi DDRC, SYNC_PIN ; set pin as output
|
|
|
|
sbi DDRC, DEBUG_PIN ; set pin as output
|
2021-01-24 11:27:40 +01:00
|
|
|
sbi DDRC, BUSY_PIN ; set pin as output
|
2021-01-19 20:55:11 +01:00
|
|
|
cbi DDRD, CLK_PIN ; set pin as input
|
2021-01-24 11:27:40 +01:00
|
|
|
ldi HIGH_ACCUM, 0xFF
|
|
|
|
out DDRA, HIGH_ACCUM ; set port as output (contains video pin)
|
|
|
|
ldi HIGH_ACCUM, 0x00
|
|
|
|
out DDRB, HIGH_ACCUM ; set port as input (used as data bus)
|
2021-01-24 12:13:17 +01:00
|
|
|
|
2021-02-20 17:02:13 +01:00
|
|
|
|
|
|
|
; **** MEMORY SETUP ****
|
|
|
|
|
2021-02-25 23:26:13 +01:00
|
|
|
call clear_screen
|
2021-01-25 08:46:01 +01:00
|
|
|
|
2021-02-15 21:23:12 +01:00
|
|
|
|
2021-01-07 13:32:01 +01:00
|
|
|
|
2021-02-20 17:02:13 +01:00
|
|
|
|
|
|
|
|
|
|
|
; **** TIMERS AND DRAWING IMAGE ROUTINES SETUP ****
|
|
|
|
|
|
|
|
; Timer setup (use 16-bit counter TC1)
|
2021-01-10 10:50:34 +01:00
|
|
|
; The Power Reduction TC1 and TC3 bits in the Power Reduction Registers (PRR0.PRTIM1 and
|
|
|
|
; PRR1.PRTIM3) must be written to zero to enable the TC1 and TC3 module.
|
2021-01-24 11:27:40 +01:00
|
|
|
ldi HIGH_ACCUM, 0b00000000
|
|
|
|
sts PRR0, HIGH_ACCUM
|
2021-01-16 19:54:32 +01:00
|
|
|
; Set timer prescaler to 1:1
|
2021-01-24 11:27:40 +01:00
|
|
|
LDI HIGH_ACCUM,0b00000001
|
|
|
|
sts TCCR1B,HIGH_ACCUM
|
2021-01-16 19:54:32 +01:00
|
|
|
; Enambe timer1 overflow interrupt
|
2021-01-24 11:27:40 +01:00
|
|
|
LDI HIGH_ACCUM,0b00000001
|
|
|
|
STS TIMSK1,HIGH_ACCUM
|
2021-01-16 19:54:32 +01:00
|
|
|
; Enable interrupts globally
|
|
|
|
SEI
|
|
|
|
; Timer setup completed.
|
2021-01-10 10:50:34 +01:00
|
|
|
|
2021-02-20 17:02:13 +01:00
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
; **** MAIN ROUTINE ****
|
|
|
|
|
2021-01-19 20:55:11 +01:00
|
|
|
; Wait for data (it never exits)
|
2021-02-25 23:26:13 +01:00
|
|
|
;jmp comm_init
|
2021-01-19 20:55:11 +01:00
|
|
|
|
2021-02-15 21:23:12 +01:00
|
|
|
|
2021-02-20 17:02:13 +01:00
|
|
|
; draw example image
|
2021-02-22 19:55:53 +01:00
|
|
|
;call draw_cat
|
2021-02-15 21:23:12 +01:00
|
|
|
|
|
|
|
; test draw character routine
|
|
|
|
call cursor_pos_home
|
|
|
|
dctest:
|
2021-02-22 19:55:53 +01:00
|
|
|
ldi r18, 0x41
|
2021-02-15 21:23:12 +01:00
|
|
|
draw_chars:
|
|
|
|
mov HIGH_ACCUM, r18
|
|
|
|
call draw_char
|
|
|
|
dc_continue:
|
|
|
|
; wait
|
|
|
|
ser r19
|
|
|
|
dc_wait_loop_1:
|
2021-02-28 19:47:08 +01:00
|
|
|
ser r16
|
2021-02-15 21:23:12 +01:00
|
|
|
dc_wait_loop_2:
|
2021-02-28 19:47:08 +01:00
|
|
|
dec r16
|
2021-02-15 21:23:12 +01:00
|
|
|
brne dc_wait_loop_2
|
|
|
|
dec r19
|
|
|
|
brne dc_wait_loop_1
|
2021-02-28 19:47:08 +01:00
|
|
|
; wait
|
|
|
|
; ser r19
|
|
|
|
; dc_wait_loop_a1:
|
|
|
|
; ser r16
|
|
|
|
; dc_wait_loop_a2:
|
|
|
|
; dec r16
|
|
|
|
; brne dc_wait_loop_a2
|
|
|
|
; dec r19
|
|
|
|
; brne dc_wait_loop_a1
|
|
|
|
; ; wait
|
|
|
|
; ser r19
|
|
|
|
; dc_wait_loop_s1:
|
|
|
|
; ser r16
|
|
|
|
; dc_wait_loop_s2:
|
|
|
|
; dec r16
|
|
|
|
; brne dc_wait_loop_s2
|
|
|
|
; dec r19
|
|
|
|
; brne dc_wait_loop_s1
|
|
|
|
; ; wait
|
|
|
|
; ser r19
|
|
|
|
; dc_wait_loop_d1:
|
|
|
|
; ser r16
|
|
|
|
; dc_wait_loop_d2:
|
|
|
|
; dec r16
|
|
|
|
; brne dc_wait_loop_d2
|
|
|
|
; dec r19
|
|
|
|
; brne dc_wait_loop_d1
|
|
|
|
; ; wait
|
|
|
|
; ser r19
|
|
|
|
; dc_wait_loop_f1:
|
|
|
|
; ser r16
|
|
|
|
; dc_wait_loop_f2:
|
|
|
|
; dec r16
|
|
|
|
; brne dc_wait_loop_f2
|
|
|
|
; dec r19
|
|
|
|
; brne dc_wait_loop_f1
|
|
|
|
|
2021-02-22 19:55:53 +01:00
|
|
|
inc r18
|
|
|
|
cpi r18, 0x5B
|
2021-02-15 21:23:12 +01:00
|
|
|
brne draw_chars
|
2021-02-28 19:47:08 +01:00
|
|
|
call draw_carriage_return
|
2021-02-15 21:23:12 +01:00
|
|
|
jmp dctest
|
|
|
|
|
2021-02-20 17:02:13 +01:00
|
|
|
|
2021-02-15 21:23:12 +01:00
|
|
|
|
|
|
|
|
2021-01-09 21:24:27 +01:00
|
|
|
forever:
|
|
|
|
jmp forever
|
2021-01-19 20:55:11 +01:00
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
.include "video_generator.asm" ; Asyncronous timer-interrupt-based video generation
|
|
|
|
.include "character_generator.asm" ; Character generator
|
2021-02-20 17:02:13 +01:00
|
|
|
;.include "communication.asm" ; Communication with Pat80
|
2021-01-24 11:27:40 +01:00
|
|
|
.include "font.asm" ; Font face
|
2021-02-25 23:26:13 +01:00
|
|
|
;.include "example_data/cat.asm" ; Cat image
|