WIP fucking video generation
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@ -1,3 +1,11 @@
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; ***** CPU REGISTER DEFINITIONS *****************************************
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.def XH = r27
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.def XL = r26
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.def YH = r29
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.def YL = r28
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.def ZH = r31
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.def ZL = r30
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; ***** I/O REGISTER DEFINITIONS *****************************************
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; NOTE:
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; Definitions marked "MEMORY MAPPED"are extended I/O ports
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@ -23,32 +23,34 @@ main:
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out DDRD, r16 ; set port as output
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; Load ram addr into register X
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ldi r16,0x00
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mov r0,r16
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ldi r16,0x01
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mov r1,r16
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mov XL,r0
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mov XH,r1
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;*** Load data into ram ***
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;ldi r27, 0x01
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;ldi r26, 0x00
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; load data
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ldi r16, 255
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load_mem_loop:
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ldi r17, 1
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;sts X, r17
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sts 0x0100, r17
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adiw XH:XL, 1 ; increment X
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dec r16 ; decrement outside counter
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brne load_mem_loop ; if not 0, repeat h_picture_loop
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; DEBUG: loads some static data in ram
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ldi r18, 255
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fill_mem_loop1:
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st X+, r18
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dec r18
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brne fill_mem_loop1
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; END DEBUG
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v_refresh_loop:
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; reset memory position counter
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;ldi XL, 0x00
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;ldi XH, 0x01
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ldi r16,0x00
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mov r0,r16
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ldi r16,0x01
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mov r1,r16
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mov XL,r0
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mov XH,r1
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; ldi r16,0x00
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; mov r0,r16
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; ldi r16,0x01
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; mov r1,r16
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; mov XL,r0
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; mov XH,r1
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; set X register to framebuffer start
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; ldi r27, 0x01
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; ldi r26, 0x00
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; start 5 long sync pulses
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call long_sync
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@ -72,43 +74,39 @@ v_refresh_loop:
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ldi r17, 152 ; line counter
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h_picture_loop:
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call line_sync
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; start line pixels: 52uS, 1247 cycles @ 24Mhz
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; start line pixels: 52uS, 1248 cycles @ 24Mhz
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ldi r18, 52 ; 1 cycle
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l_sync_video_loop: ; 24 cycles
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; Load a byte from memory into PORTD register and increment the counter.
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; This also displays byte's MSB pixel "for free", as the video pin is PD7
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; (last bit of PORTD).
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;ld r19, X+ ; 2 cycles
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ld r19, X ; 1 cycle
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nop
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lds r19, 0x0100 ; 2 cycles
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out PORTD, r19 ; 1 cycle
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; Shift the byte to the left to show another bit (do it 7 times)
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lsl r19 ; 1 cycle
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out PORTD, r19
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nop
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lsl r19 ; 1 cycle
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out PORTD, r19
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nop
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lsl r19 ; 1 cycle
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out PORTD, r19
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nop
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lsl r19 ; 1 cycle
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out PORTD, r19
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nop
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lsl r19 ; 1 cycle
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out PORTD, r19
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nop
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lsl r19 ; 1 cycle
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out PORTD, r19
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rol r19 ; 1 cycle
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out PORTD, r19 ; 1 cycle
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nop ; 1 cycle
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rol r19 ; 1 cycle
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out PORTD, r19 ; 1 cycle
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nop ; 1 cycle
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rol r19 ; 1 cycle
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out PORTD, r19 ; 1 cycle
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nop ; 1 cycle
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rol r19 ; 1 cycle
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out PORTD, r19 ; 1 cycle
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nop ; 1 cycle
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rol r19 ; 1 cycle
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out PORTD, r19 ; 1 cycle
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nop ; 1 cycle
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rol r19 ; 1 cycle
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out PORTD, r19 ; 1 cycle
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nop ; 1 cycle
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dec r18 ; 1 cycle
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brne l_sync_video_loop ; 2 cycles if jumps (1 if continues)
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; end line pixels
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cbi PORTD, VIDEO_PIN ; video pin goes low before sync
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dec r17 ; decrement line counter
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dec r17 ; decrement line countr
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brne h_picture_loop ; if not 0, repeat h_picture_loop
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dec r16 ; decrement outside counter
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