First working image with a lot of jitter
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60243dc95f
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@ -18,11 +18,19 @@ main:
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v_refresh_loop:
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; start 5 long sync pulses
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call long_sync
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call long_sync
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call long_sync
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call long_sync
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call long_sync
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; end 5 long sync pulses
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; start 5 short sync pulses
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call short_sync
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call short_sync
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call short_sync
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call short_sync
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call short_sync
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; end 5 short sync pulses
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; start 304 picture lines
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@ -79,3 +87,56 @@ v_refresh_loop:
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dec r16 ; decrement outside counter
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brne h_picture_outer_loop ; if not 0, repeat h_picture_loop
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; end picture lines
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; start 6 short sync pulses
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call short_sync
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call short_sync
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call short_sync
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call short_sync
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call short_sync
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; end 6 short sync pulses
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jmp v_refresh_loop
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; end vertical refresh
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long_sync:
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; long sync: 30uS low (719 cycles @ 24Mhz), 2uS high (48 cycles @ 24Mhz)
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cbi PORTD, SYNC_PIN ; sync goes low (0v) ; 2 cycle
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ldi r18, 120 ; 1 cycle
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long_sync_low_loop: ; requires 6 cpu cycles
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nop ; 1 cycle
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nop ; 1 cycle
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nop ; 1 cycle
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dec r18 ; 1 cycle
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brne long_sync_low_loop ; 2 cycle if true, 1 if false
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sbi PORTD, SYNC_PIN ; sync goes high (0.3v)
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ldi r18, 16 ; 1 cycle
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long_sync_high_loop: ; requires 3 cpu cycles
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dec r18 ; 1 cycle
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brne long_sync_high_loop ; 2 cycle if true, 1 if false
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ret
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short_sync:
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; short sync: 2uS low (48 cycles @ 24Mhz), 30uS high
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cbi PORTD, SYNC_PIN ; sync goes low (0v) ; 2 cycle
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ldi r18, 16 ; 1 cycle
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short_sync_low_loop: ; requires 3 cpu cycles
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dec r18 ; 1 cycle
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brne long_sync_low_loop ; 2 cycle if true, 1 if false
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sbi PORTD, SYNC_PIN ; sync goes high (0.3v)
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ldi r18, 120 ; 1 cycle
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short_sync_high_loop: ; requires 6 cpu cycles
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nop ; 1 cycle
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nop ; 1 cycle
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nop ; 1 cycle
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dec r18 ; 1 cycle
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brne short_sync_high_loop ; 2 cycle if true, 1 if false
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ret
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