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Not working implementation of timer-driven video signal generation 2

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Daniele Verducci (ZenPenguin) 2021-01-10 11:30:47 +01:00
parent ce23f9e799
commit 90c200e6a9
1 changed files with 4 additions and 1 deletions
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pat80-io-devices/composite-pal-adapter/software/avr-assembly/main.asm
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@ -85,8 +85,11 @@ main:
; Set prescaler to 1:1 (TCCR1B is XXXXX001)
ldi r16, 0b00000001
sts TCCR1B, r16
; Clear pending interrupts
ldi r16, 0b00000001
out TIFR1,r16
; Enable timer1 overflow interrupt(TOIE1): the interrupt 1 will be fired when timer resets
ldi r16, 0b00000100
ldi r16, 0b00000001
sts TIMSK1, r16
; The Global Interrupt Enable bit must be set for the interrupts to be enabled.
ldi r16, 0b10000000