penguin86/pato-z80-home-computer
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Big refactoring and first character generator implementation

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This commit is contained in:
Daniele Verducci (ZenPenguin)
2021-01-24 11:27:40 +01:00
parent 415300a2db
commit f49818caa1
5 changed files with 666 additions and 591 deletions
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52
pat80-io-devices/composite-pal-adapter/software/avr-assembly/main.asm
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@@ -8,14 +8,21 @@
; If the busy pin is high, retry reading until goes low. When the busy pin goes low, we have... TODO
;
; ELECTRONICALLY:
; The data port D0 (= PB0) is tied to ground with a 1KOhm resistance. When the MC is busy drawing the screen, the data port is in
; The data port PB0 is tied to ground with a 1KOhm resistance. When the MC is busy drawing the screen, the data port is in
; high impedance state, so that avoids causing bus contention, but when read returns a 0bXXXXXXX0 byte. When the MC starts vsync,
; begins checking the port for data... TODO
;
; PINS:
; Video pin: PA0 (pin 1)
; Sync pin: PC0 (pin 22)
; Debug hsync pin: PC1 (pin 23)
; Video:
; Video pin: PA0 (pin 1) (but all PORTA is used)
; Sync pin: PC0 (pin 22)
; Communication:
; Data port is PORTB [INPUT]
; CLK (clock) signal is on PORTD0 [INPUT]
; RS (register select) on PORTD1 [INPUT]
; BUSY signal is on PORTD2 [OUTPUT]
; Debug:
; Debug hsync single pulse on pin: PC1 (pin 23) (may be disabled)
;
.include "m1284def.inc" ; Atmega 1280 device definition
@@ -23,14 +30,21 @@
; reserved registers
.def A = r0 ; accumulator
.def STATUS = r25 ; signal status (see STATUS TABLE)
.def POS_COARSE = Z ; coarse position (aligned to character column)
.def POS_COARSE_H = r31
.def POS_COARSE_L = r30
;POS_COARSE = Y ; coarse position (aligned to character column)
;DRAWING_BYTE = X ; coarse position (aligned to character column)
.def POS_FINE = r24 ; fine position (bit inside coarse-position-pointed byte)
.def LINE_COUNTER = r23 ; fine position (bit inside coarse-position-pointed byte)
.def VG_HIGH_ACCUM = r22 ; an accumulator in high registers to be used only by video_generator in interrupt
.def HIGH_ACCUM = r16 ; an accumulator in high registers to be used outside of interrupts
; define constant
.equ VIDEO_PORT_OUT = PORTA ; Used all PORTA, but connected only PA0
.equ SYNC_PIN = PC0 ; Sync pin (pin 22)
.equ DEBUG_PIN = PC1 ; DEBUG: Single vertical sync pulse to trigger oscilloscope (pin 23)
.equ CLK_PIN = PD7
.equ DATA_PORT_IN = PINB
.equ CLK_PIN = PD0
.equ RS_PIN = PD1
.equ BUSY_PIN = PD2
; memory
.equ FRAMEBUFFER = 0x100
@@ -47,25 +61,26 @@ main:
; pins setup
sbi DDRC, SYNC_PIN ; set pin as output
sbi DDRC, DEBUG_PIN ; set pin as output
sbi DDRC, BUSY_PIN ; set pin as output
cbi DDRD, CLK_PIN ; set pin as input
ldi r16, 0xFF
out DDRA, r16 ; set port as output (contains video pin)
ldi r16, 0x00
out DDRB, r16 ; set port as input (used as data bus)
ldi HIGH_ACCUM, 0xFF
out DDRA, HIGH_ACCUM ; set port as output (contains video pin)
ldi HIGH_ACCUM, 0x00
out DDRB, HIGH_ACCUM ; set port as input (used as data bus)
; *** timer setup (use 16-bit counter TC1) ***
; The Power Reduction TC1 and TC3 bits in the Power Reduction Registers (PRR0.PRTIM1 and
; PRR1.PRTIM3) must be written to zero to enable the TC1 and TC3 module.
ldi r16, 0b00000000
sts PRR0, r16
ldi HIGH_ACCUM, 0b00000000
sts PRR0, HIGH_ACCUM
; Set timer prescaler to 1:1
LDI r16,0b00000001
sts TCCR1B,r16
LDI HIGH_ACCUM,0b00000001
sts TCCR1B,HIGH_ACCUM
; Enambe timer1 overflow interrupt
LDI r16,0b00000001
STS TIMSK1,r16
LDI HIGH_ACCUM,0b00000001
STS TIMSK1,HIGH_ACCUM
; Enable interrupts globally
SEI
; Timer setup completed.
@@ -82,3 +97,4 @@ main:
.include "video_generator.asm" ; Asyncronous timer-interrupt-based video generation
.include "character_generator.asm" ; Character generator
.include "communication.asm" ; Communication with Pat80
.include "font.asm" ; Font face