Perfected timings
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@ -32,7 +32,7 @@
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.equ TIMER_DELAY_60US = 65535 - 1409 ; 719 cycles @ 24Mhz (minus overhead)
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.equ TIMER_DELAY_30US = 65535 - 690 ; 719 cycles @ 24Mhz (minus overhead)
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.equ TIMER_DELAY_2US = 65535 - 17 ; 48 cycles @ 24Mhz (minus overhead)
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.equ TIMER_DELAY_4US = 65535 - 65 ; 96 cycles @ 24Mhz (minus overhead)
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.equ TIMER_DELAY_4US = 65535 - 64 ; 96 cycles @ 24Mhz (minus overhead)
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.equ BACK_PORCH_DELAY = 234 ; 186 cycles back porch + 48 cycles to leave 2 chunks empty (image padding)
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@ -43,8 +43,8 @@ on_tim1_ovf:
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sbi PORTD, BUSY_PIN
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; called by timer 1 two times per line (every 32 uS) during hsync, unless drawing picture.
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inc STATUS
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; if STATUS >= 83 then STATUS=0
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cpi STATUS, 85 ; TODO: Added a seventh sync pulse at end of screen because at the first short sync after the image, the timer doesn't tick at the right time
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; if STATUS >= 176 then STATUS=0
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cpi STATUS, 178 ; TODO: Added a seventh sync pulse at end of screen because at the first short sync after the image, the timer doesn't tick at the right time
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brlo switch_status
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clr STATUS
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; check status and decide what to do
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@ -53,13 +53,12 @@ on_tim1_ovf:
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brlo long_sync ; 0-9: long sync
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cpi STATUS, 20
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brlo short_sync ; 10-19: short sync
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cpi STATUS, 45
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brlo empty_line ; 20-45: empty lines
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cpi STATUS, 45
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breq start_draw_picture ; 20: draw picture
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cpi STATUS, 71
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brlo empty_line ; 46-70 = draw empty lines
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jmp short_sync ; 71-82 = short sync
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cpi STATUS, 92
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brlo empty_line ; 20-91: empty lines
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breq start_draw_picture ; 92: draw picture
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cpi STATUS, 164
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brlo empty_line ; 93-165 = draw empty lines
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jmp short_sync ; 166-177 = short sync
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; reti is at end of all previous jumps
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start_draw_picture:
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@ -1360,10 +1359,10 @@ draw_line:
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lsr A ; 1 cycle
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out VIDEO_PORT_OUT, A ; 1 cycle
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; chunk 47, 48, 49 (blank)
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; blank right margin
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clr A ; 1 cycle
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out VIDEO_PORT_OUT, A ; 1 cycle
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ldi VG_HIGH_ACCUM, 31 ; 1 cycle
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ldi VG_HIGH_ACCUM, 28 ; 1 cycle
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eol_porch_loop: ; requires 3 cpu cycles
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dec VG_HIGH_ACCUM ; 1 cycle
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brne eol_porch_loop ; 2 if jumps, 1 if continues
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